From d63026f62ac0d9c4674a93d12843ea96e77b3c5e Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Sun, 13 Apr 2014 12:37:32 +1200 Subject: [PATCH] i965: Use ctx->Texture._MaxEnabledTexImageUnit for upper bound Avoid looping over 32/48/96 (!!) tex image units every draw, most of which we don't care about. Improves performance on everyone's favorite not-a-benchmark by 2.9% on Haswell. Signed-off-by: Chris Forbes Reviewed-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_draw.c | 3 ++- src/mesa/drivers/dri/i965/brw_tex.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 583c7d66b20..34afc26ccbd 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -315,7 +315,8 @@ brw_predraw_resolve_buffers(struct brw_context *brw) intel_renderbuffer_resolve_hiz(brw, depth_irb); /* Resolve depth buffer and render cache of each enabled texture. */ - for (int i = 0; i < ctx->Const.MaxCombinedTextureImageUnits; i++) { + int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit; + for (int i = 0; i <= maxEnabledUnit; i++) { if (!ctx->Texture.Unit[i]._ReallyEnabled) continue; tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current); diff --git a/src/mesa/drivers/dri/i965/brw_tex.c b/src/mesa/drivers/dri/i965/brw_tex.c index b1f4de07149..305d83d09da 100644 --- a/src/mesa/drivers/dri/i965/brw_tex.c +++ b/src/mesa/drivers/dri/i965/brw_tex.c @@ -46,8 +46,9 @@ void brw_validate_textures( struct brw_context *brw ) { struct gl_context *ctx = &brw->ctx; int i; + int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit; - for (i = 0; i < ctx->Const.MaxCombinedTextureImageUnits; i++) { + for (i = 0; i <= maxEnabledUnit; i++) { struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i]; if (texUnit->_ReallyEnabled) { -- 2.30.2