From d671eb140f05d4974cebf6e6643282a8a7ce45db Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Sat, 8 Jun 2013 09:55:36 -0700 Subject: [PATCH] i965: Emit invariant state once at startup on Gen6+. Now that we have hardware contexts, we can safely initialize our GPU state once at startup, rather than needing a state atom with the BRW_NEW_CONTEXT flag set. This removes a tiny bit of code from our drawing loop. Reviewed-by: Eric Anholt Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_misc_state.c | 5 +++-- src/mesa/drivers/dri/i965/brw_state.h | 1 + src/mesa/drivers/dri/i965/brw_state_upload.c | 18 ++++++++++++++++-- 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 8162eeb66f6..7e41c849117 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -978,7 +978,8 @@ const struct brw_tracked_state brw_line_stipple = { * Misc invariant state packets */ -static void upload_invariant_state( struct brw_context *brw ) +void +brw_upload_invariant_state(struct brw_context *brw) { struct intel_context *intel = &brw->intel; @@ -1016,7 +1017,7 @@ const struct brw_tracked_state brw_invariant_state = { .brw = BRW_NEW_CONTEXT, .cache = 0 }, - .emit = upload_invariant_state + .emit = brw_upload_invariant_state }; /** diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 9afc6bbad2b..7215128c49a 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -125,6 +125,7 @@ extern const struct brw_tracked_state gen7_wm_state; extern const struct brw_tracked_state haswell_cut_index; /* brw_misc_state.c */ +void brw_upload_invariant_state(struct brw_context *brw); uint32_t brw_depthbuffer_format(struct brw_context *brw); diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 07c49ff1c21..6a69a677dde 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -111,7 +111,6 @@ static const struct brw_tracked_state *gen6_atoms[] = &gen6_sf_vp, /* Command packets: */ - &brw_invariant_state, /* must do before binding table pointers, cc state ptrs */ &brw_state_base_address, @@ -177,7 +176,6 @@ static const struct brw_tracked_state *gen7_atoms[] = &brw_wm_prog, /* Command packets: */ - &brw_invariant_state, &gen7_push_constant_alloc, /* must do before binding table pointers, cc state ptrs */ @@ -241,6 +239,20 @@ static const struct brw_tracked_state *gen7_atoms[] = &haswell_cut_index, }; +static void +brw_upload_initial_gpu_state(struct brw_context *brw) +{ + struct intel_context *intel = &brw->intel; + + /* On platforms with hardware contexts, we can set our initial GPU state + * right away rather than doing it via state atoms. This saves a small + * amount of overhead on every draw call. + */ + if (!intel->hw_ctx) + return; + + brw_upload_invariant_state(brw); +} void brw_init_state( struct brw_context *brw ) { @@ -270,6 +282,8 @@ void brw_init_state( struct brw_context *brw ) assert((*atoms)->emit); atoms++; } + + brw_upload_initial_gpu_state(brw); } -- 2.30.2