From d6ae079771bc8f5ae3a9e8a333c50a6cacb7a77c Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Tue, 7 Apr 2020 17:22:10 -0700 Subject: [PATCH] intel/fs/gen12: Fix hangs with per-sample SIMD32 fragment shader dispatch. The Gen12 docs are rather contradictory regarding the dispatch configurations supported by the fragment shader -- The same table present in previous generations seems to imply that only one dispatch mode can be enabled when doing per-sample shading, but a restriction documented in the 3DSTATE_PS_BODY page implies the opposite: That SIMD32 can only be used in combination with some other dispatch mode. The latter seems to match the behavior of real hardware as I could tell from my testing: A bunch of multisample test-cases that do per-sample shading hang if we only provide a SIMD32 shader. Reviewed-by: Kenneth Graunke --- src/intel/compiler/brw_fs.cpp | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 0fa0be683f0..0c6fe0bbf3b 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -8793,13 +8793,20 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data, if (prog_data->persample_dispatch) { /* Starting with SandyBridge (where we first get MSAA), the different * pixel dispatch combinations are grouped into classifications A - * through F (SNB PRM Vol. 2 Part 1 Section 7.7.1). On all hardware + * through F (SNB PRM Vol. 2 Part 1 Section 7.7.1). On most hardware * generations, the only configurations supporting persample dispatch - * are are this in which only one dispatch width is enabled. + * are those in which only one dispatch width is enabled. + * + * The Gen12 hardware spec has a similar dispatch grouping table, but + * the following conflicting restriction applies (from the page on + * "Structure_3DSTATE_PS_BODY"), so we need to keep the SIMD16 shader: + * + * "SIMD32 may only be enabled if SIMD16 or (dual)SIMD8 is also + * enabled." */ if (simd32_cfg || simd16_cfg) simd8_cfg = NULL; - if (simd32_cfg) + if (simd32_cfg && devinfo->gen < 12) simd16_cfg = NULL; } -- 2.30.2