From d7709b941ac080905bab2943a6b5d8f660dc66a0 Mon Sep 17 00:00:00 2001 From: Tobias Platen Date: Sun, 15 May 2022 20:30:49 +0200 Subject: [PATCH] set dram_clk_freq = 100.0e6 for orangecrab --- src/ls2.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ls2.py b/src/ls2.py index 53c3792..f1efb8f 100644 --- a/src/ls2.py +++ b/src/ls2.py @@ -876,7 +876,7 @@ def build_platform(fpga, firmware): clk_freq = 40.0e6 if fpga == 'orangecrab': clk_freq = 40.0e6 # 50 MHz does not work - ##dram_clk_freq = 80.0e6 # does not work yet (0 warnings, 2 errors) + dram_clk_freq = 100.0e6 # does not work yet (0 warnings, 2 errors) # merge dram_clk_freq with clk_freq if the same if clk_freq == dram_clk_freq: -- 2.30.2