From d7f2e6e4e5ce10ae039f0149320c6020d7451ebe Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Mon, 29 May 2023 01:04:55 +0300 Subject: [PATCH] ppc/svp64: support avgadd instructions --- gas/testsuite/gas/ppc/avgadd.d | 14 ++++++++++++++ gas/testsuite/gas/ppc/avgadd.s | 6 ++++++ gas/testsuite/gas/ppc/ppc.exp | 1 + opcodes/ppc-opc.c | 3 +++ 4 files changed, 24 insertions(+) create mode 100644 gas/testsuite/gas/ppc/avgadd.d create mode 100644 gas/testsuite/gas/ppc/avgadd.s diff --git a/gas/testsuite/gas/ppc/avgadd.d b/gas/testsuite/gas/ppc/avgadd.d new file mode 100644 index 00000000000..062e78358e2 --- /dev/null +++ b/gas/testsuite/gas/ppc/avgadd.d @@ -0,0 +1,14 @@ +#as: -mlibresoc +#objdump: -dr -Mlibresoc + +.*: file format .* + + +Disassembly of section \.text: +0+ <\.text>: +.*:\s+(5b e0 06 9c|9c 06 e0 5b)\s+avgadd\s+r31,r0,r0 +.*:\s+(58 1f 06 9c|9c 06 1f 58)\s+avgadd\s+r0,r31,r0 +.*:\s+(58 00 fe 9c|9c fe 00 58)\s+avgadd\s+r0,r0,r31 +.*:\s+(5b e0 06 9d|9d 06 e0 5b)\s+avgadd.\s+r31,r0,r0 +.*:\s+(58 1f 06 9d|9d 06 1f 58)\s+avgadd.\s+r0,r31,r0 +.*:\s+(58 00 fe 9d|9d fe 00 58)\s+avgadd.\s+r0,r0,r31 diff --git a/gas/testsuite/gas/ppc/avgadd.s b/gas/testsuite/gas/ppc/avgadd.s new file mode 100644 index 00000000000..92d24801930 --- /dev/null +++ b/gas/testsuite/gas/ppc/avgadd.s @@ -0,0 +1,6 @@ +avgadd 31,0,0 +avgadd 0,31,0 +avgadd 0,0,31 +avgadd. 31,0,0 +avgadd. 0,31,0 +avgadd. 0,0,31 diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index 63503b66788..370b126c3d2 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -163,3 +163,4 @@ run_dump_test "svremap" run_dump_test "svindex" run_dump_test "fmvis" run_dump_test "fishmv" +run_dump_test "avgadd" diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 3cfb95a5999..22125adbde8 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -7032,6 +7032,9 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"svremap", SVRM(22,57), SVRM_MASK, SVP64, PPCVLE, {SVme, mi0, mi1, mi2, mo0, mo1, pst}}, +{"avgadd", XRC(22,846,0), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, +{"avgadd.", XRC(22,846,1), X_MASK, SVP64, PPCVLE, {RT, RA, RB}}, + {"rotlw", MME(23,31,0), MMBME_MASK, PPCCOM, PPCVLE|EXT, {RA, RS, RB}}, {"rlwnm", M(23,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, RB, MBE, ME}}, {"rlnm", M(23,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}}, -- 2.30.2