From d80fb024302aa6058945826a79ba0caf9611fcc1 Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Tue, 14 Apr 2020 01:44:10 +0200 Subject: [PATCH] winsys/amdgpu: Retrieve WC flags from imported buffers. MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Otherwise reading from an imported mapped GTT+WC linear texture is painfully slow. Sadly no radeon winsys implementation, as I don't know a suitable kernel driver operation. Hit this in vaGetImage with an image imported from minigbm (which we are switching to allocate WC for SCANOUT images). Cc: Reviewed-by: Marek Olšák Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeon/radeon_winsys.h | 8 ++++++++ src/gallium/drivers/radeonsi/si_texture.c | 2 ++ src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 14 ++++++++++++++ src/gallium/winsys/amdgpu/drm/amdgpu_bo.h | 1 + 4 files changed, 25 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index d02370af671..a2293837763 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -444,6 +444,14 @@ struct radeon_winsys { */ enum radeon_bo_domain (*buffer_get_initial_domain)(struct pb_buffer *buf); + /** + * Query the flags used for creation of this buffer. + * + * Note that for imported buffer this may be lossy since not all flags + * are passed 1:1. + */ + enum radeon_bo_flag (*buffer_get_flags)(struct pb_buffer *buf); + /************************************************************************** * Command submission. * diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 4f7744a887d..3b10fb0636b 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -1303,6 +1303,8 @@ static struct si_texture *si_texture_create_object(struct pipe_screen *screen, resource->vram_usage = resource->bo_size; else if (resource->domains & RADEON_DOMAIN_GTT) resource->gart_usage = resource->bo_size; + if (sscreen->ws->buffer_get_flags) + resource->flags = sscreen->ws->buffer_get_flags(resource->buf); } if (tex->cmask_buffer) { diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index 8a821c8fd4f..e5a9278ce23 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -148,6 +148,12 @@ static enum radeon_bo_domain amdgpu_bo_get_initial_domain( return ((struct amdgpu_winsys_bo*)buf)->initial_domain; } +static enum radeon_bo_flag amdgpu_bo_get_flags( + struct pb_buffer *buf) +{ + return ((struct amdgpu_winsys_bo*)buf)->flags; +} + static void amdgpu_bo_remove_fences(struct amdgpu_winsys_bo *bo) { for (unsigned i = 0; i < bo->num_fences; ++i) @@ -559,6 +565,7 @@ static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws, bo->va = va; bo->u.real.va_handle = va_handle; bo->initial_domain = initial_domain; + bo->flags = flags; bo->unique_id = __sync_fetch_and_add(&ws->next_bo_unique_id, 1); if (initial_domain & RADEON_DOMAIN_VRAM) @@ -1435,6 +1442,7 @@ static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws, amdgpu_va_handle va_handle = NULL; struct amdgpu_bo_info info = {0}; enum radeon_bo_domain initial = 0; + enum radeon_bo_flag flags = 0; int r; switch (whandle->type) { @@ -1495,6 +1503,10 @@ static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws, initial |= RADEON_DOMAIN_VRAM; if (info.preferred_heap & AMDGPU_GEM_DOMAIN_GTT) initial |= RADEON_DOMAIN_GTT; + if (info.alloc_flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS) + flags |= RADEON_FLAG_NO_CPU_ACCESS; + if (info.alloc_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) + flags |= RADEON_FLAG_GTT_WC; /* Initialize the structure. */ simple_mtx_init(&bo->lock, mtx_plain); @@ -1507,6 +1519,7 @@ static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws, bo->va = va; bo->u.real.va_handle = va_handle; bo->initial_domain = initial; + bo->flags = flags; bo->unique_id = __sync_fetch_and_add(&ws->next_bo_unique_id, 1); bo->is_shared = true; @@ -1705,4 +1718,5 @@ void amdgpu_bo_init_functions(struct amdgpu_screen_winsys *ws) ws->base.buffer_commit = amdgpu_bo_sparse_commit; ws->base.buffer_get_virtual_address = amdgpu_bo_get_va; ws->base.buffer_get_initial_domain = amdgpu_bo_get_initial_domain; + ws->base.buffer_get_flags = amdgpu_bo_get_flags; } diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h index fa8aabbeede..9f37437cd6e 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h @@ -96,6 +96,7 @@ struct amdgpu_winsys_bo { uint32_t unique_id; uint64_t va; enum radeon_bo_domain initial_domain; + enum radeon_bo_flag flags; /* how many command streams is this bo referenced in? */ int num_cs_references; -- 2.30.2