From d81c7081b5a7848176a546384d9170408d4c9459 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 10 Jun 2021 22:16:51 +0100 Subject: [PATCH] ooo annoying, pinouts needed mirror-image --- 180nm_Oct2020/ls180.mdwn | 306 +++++++++++++++++++-------------------- 180nm_Oct2020/ls180.svg | 2 + 2 files changed, 155 insertions(+), 153 deletions(-) create mode 100644 180nm_Oct2020/ls180.svg diff --git a/180nm_Oct2020/ls180.mdwn b/180nm_Oct2020/ls180.mdwn index d51e96dff..ffd1b35d8 100644 --- a/180nm_Oct2020/ls180.mdwn +++ b/180nm_Oct2020/ls180.mdwn @@ -26,38 +26,38 @@ auto-generated by [[pinouts.py]] | Pin | Mux0 | Mux1 | Mux2 | Mux3 | | --- | ----------- | ----------- | ----------- | ----------- | -| 32 | E SYS_PLLVCOUT | | -| 33 | E GPIOE_E0 | | -| 34 | E GPIOE_E1 | | -| 35 | E GPIOE_E2 | | -| 36 | E GPIOE_E3 | | -| 37 | E GPIOE_E4 | | +| 32 | E GPIOE_E0 | | +| 33 | E GPIOE_E1 | | +| 34 | E GPIOE_E2 | | +| 35 | E GPIOE_E3 | | +| 36 | E GPIOE_E4 | | +| 37 | E GPIOE_E5 | | | 38 | E VSSE_4 | | | 39 | E VDDE_4 | | | 40 | E VDDI_4 | | | 41 | E VSSI_4 | | -| 42 | E GPIOE_E5 | | -| 43 | E GPIOE_E6 | | -| 44 | E GPIOE_E7 | | +| 42 | E GPIOE_E6 | | +| 43 | E GPIOE_E7 | | +| 44 | E GPIOE_E8 | | | 45 | E JTAG_TMS | | | 46 | E JTAG_TDI | | | 47 | E JTAG_TDO | | | 48 | E JTAG_TCK | | -| 49 | E GPIOE_E8 | | -| 50 | E GPIOE_E9 | | -| 51 | E GPIOE_E10 | | -| 52 | E GPIOE_E11 | | -| 53 | E GPIOE_E12 | | +| 49 | E GPIOE_E9 | | +| 50 | E GPIOE_E10 | | +| 51 | E GPIOE_E11 | | +| 52 | E GPIOE_E12 | | +| 53 | E GPIOE_E13 | | | 54 | E VSSI_5 | | | 55 | E VDDI_5 | | | 56 | E VSSE_5 | | | 57 | E VDDE_5 | | -| 58 | E GPIOE_E13 | | -| 59 | E GPIOE_E14 | | -| 60 | E GPIOE_E15 | | -| 61 | E EINT_0 | | -| 62 | E EINT_1 | | -| 63 | E EINT_2 | | +| 58 | E GPIOE_E14 | | +| 59 | E GPIOE_E15 | | +| 60 | E EINT_0 | | +| 61 | E EINT_1 | | +| 62 | E EINT_2 | | +| 63 | E SYS_PLLVCOUT | | ## Bank S (32 pins, width 2) @@ -100,37 +100,37 @@ auto-generated by [[pinouts.py]] | Pin | Mux0 | Mux1 | Mux2 | Mux3 | | --- | ----------- | ----------- | ----------- | ----------- | -| 96 | W VDDE_0 | | -| 97 | W VSSE_0 | | -| 98 | W VDDI_0 | | -| 99 | W VSSI_0 | | -| 100 | W MTWI_SDA | | -| 101 | W MTWI_SCL | | -| 102 | W SDR_DQM0 | | -| 103 | W SDR_D0 | | -| 104 | W SDR_D1 | | -| 105 | W SDR_D2 | | -| 106 | W SDR_D3 | | -| 107 | W SDR_D4 | | -| 108 | W SDR_D5 | | -| 109 | W SDR_D6 | | -| 110 | W SDR_D7 | | -| 111 | W SDR_BA0 | | -| 112 | W SDR_BA1 | | -| 113 | W SDR_AD0 | | -| 114 | W SDR_AD1 | | -| 115 | W SDR_AD2 | | -| 116 | W SDR_AD3 | | -| 118 | W VSSI_1 | | -| 119 | W VDDI_1 | | -| 120 | W VSSE_1 | | -| 121 | W VDDE_1 | | -| 122 | W SDR_AD4 | | -| 123 | W SDR_AD5 | | -| 124 | W SDR_AD6 | | -| 125 | W SDR_AD7 | | -| 126 | W SDR_AD8 | | -| 127 | W SDR_AD9 | | +| 96 | W SDR_AD9 | | +| 97 | W SDR_AD8 | | +| 98 | W SDR_AD7 | | +| 99 | W SDR_AD6 | | +| 100 | W SDR_AD5 | | +| 101 | W SDR_AD4 | | +| 102 | W VDDE_0 | | +| 103 | W VSSE_0 | | +| 104 | W VDDI_0 | | +| 105 | W VSSI_0 | | +| 106 | W MTWI_SDA | | +| 107 | W MTWI_SCL | | +| 108 | W SDR_DQM0 | | +| 109 | W SDR_D0 | | +| 110 | W SDR_D1 | | +| 111 | W SDR_D2 | | +| 112 | W SDR_D3 | | +| 113 | W SDR_D4 | | +| 114 | W SDR_D5 | | +| 115 | W SDR_D6 | | +| 116 | W SDR_D7 | | +| 117 | W SDR_BA0 | | +| 118 | W SDR_BA1 | | +| 119 | W SDR_AD0 | | +| 120 | W SDR_AD1 | | +| 121 | W SDR_AD2 | | +| 122 | W SDR_AD3 | | +| 124 | W VSSI_1 | | +| 125 | W VDDI_1 | | +| 126 | W VSSE_1 | | +| 127 | W VDDE_1 | | # Pinouts (Fixed function) @@ -142,30 +142,30 @@ auto-generated by [[pinouts.py]] External Interrupt -* EINT_0 : E29/0 -* EINT_1 : E30/0 -* EINT_2 : E31/0 +* EINT_0 : E28/0 +* EINT_1 : E29/0 +* EINT_2 : E30/0 ## GPIO GPIO -* GPIOE_E0 : E1/0 -* GPIOE_E1 : E2/0 -* GPIOE_E10 : E19/0 -* GPIOE_E11 : E20/0 -* GPIOE_E12 : E21/0 -* GPIOE_E13 : E26/0 -* GPIOE_E14 : E27/0 -* GPIOE_E15 : E28/0 -* GPIOE_E2 : E3/0 -* GPIOE_E3 : E4/0 -* GPIOE_E4 : E5/0 -* GPIOE_E5 : E10/0 -* GPIOE_E6 : E11/0 -* GPIOE_E7 : E12/0 -* GPIOE_E8 : E17/0 -* GPIOE_E9 : E18/0 +* GPIOE_E0 : E0/0 +* GPIOE_E1 : E1/0 +* GPIOE_E10 : E18/0 +* GPIOE_E11 : E19/0 +* GPIOE_E12 : E20/0 +* GPIOE_E13 : E21/0 +* GPIOE_E14 : E26/0 +* GPIOE_E15 : E27/0 +* GPIOE_E2 : E2/0 +* GPIOE_E3 : E3/0 +* GPIOE_E4 : E4/0 +* GPIOE_E5 : E5/0 +* GPIOE_E6 : E10/0 +* GPIOE_E7 : E11/0 +* GPIOE_E8 : E12/0 +* GPIOE_E9 : E17/0 ## JTAG @@ -189,49 +189,49 @@ SPI Master 1 (general) I2C Master 1 -* MTWI_SCL : W5/0 -* MTWI_SDA : W4/0 +* MTWI_SCL : W11/0 +* MTWI_SDA : W10/0 ## SDR SDRAM -* SDR_AD0 : W17/0 -* SDR_AD1 : W18/0 +* SDR_AD0 : W23/0 +* SDR_AD1 : W24/0 * SDR_AD10 : S0/0 * SDR_AD11 : S1/0 * SDR_AD12 : S2/0 -* SDR_AD2 : W19/0 -* SDR_AD3 : W20/0 -* SDR_AD4 : W26/0 -* SDR_AD5 : W27/0 -* SDR_AD6 : W28/0 -* SDR_AD7 : W29/0 -* SDR_AD8 : W30/0 -* SDR_AD9 : W31/0 -* SDR_BA0 : W15/0 -* SDR_BA1 : W16/0 +* SDR_AD2 : W25/0 +* SDR_AD3 : W26/0 +* SDR_AD4 : W5/0 +* SDR_AD5 : W4/0 +* SDR_AD6 : W3/0 +* SDR_AD7 : W2/0 +* SDR_AD8 : W1/0 +* SDR_AD9 : W0/0 +* SDR_BA0 : W21/0 +* SDR_BA1 : W22/0 * SDR_CASn : S19/0 * SDR_CKE : S17/0 * SDR_CLK : S16/0 * SDR_CSn0 : S21/0 -* SDR_D0 : W7/0 -* SDR_D1 : W8/0 +* SDR_D0 : W13/0 +* SDR_D1 : W14/0 * SDR_D10 : S10/0 * SDR_D11 : S11/0 * SDR_D12 : S12/0 * SDR_D13 : S13/0 * SDR_D14 : S14/0 * SDR_D15 : S15/0 -* SDR_D2 : W9/0 -* SDR_D3 : W10/0 -* SDR_D4 : W11/0 -* SDR_D5 : W12/0 -* SDR_D6 : W13/0 -* SDR_D7 : W14/0 +* SDR_D2 : W15/0 +* SDR_D3 : W16/0 +* SDR_D4 : W17/0 +* SDR_D5 : W18/0 +* SDR_D6 : W19/0 +* SDR_D7 : W20/0 * SDR_D8 : S8/0 * SDR_D9 : S9/0 -* SDR_DQM0 : W6/0 +* SDR_DQM0 : W12/0 * SDR_DQM1 : S3/0 * SDR_RASn : S18/0 * SDR_WEn : S20/0 @@ -244,7 +244,7 @@ System Control * SYS_PLLSELA0 : N29/0 * SYS_PLLSELA1 : N30/0 * SYS_PLLTESTOUT : N31/0 -* SYS_PLLVCOUT : E0/0 +* SYS_PLLVCOUT : E31/0 * SYS_RST : N27/0 ## UART0 @@ -258,16 +258,16 @@ UART (TX/RX) 1 Power -* VDDE_0 : W0/0 -* VDDE_1 : W25/0 +* VDDE_0 : W6/0 +* VDDE_1 : W31/0 * VDDE_2 : S4/0 * VDDE_3 : S25/0 * VDDE_4 : E7/0 * VDDE_5 : E25/0 * VDDE_6 : N7/0 * VDDE_7 : N25/0 -* VDDI_0 : W2/0 -* VDDI_1 : W23/0 +* VDDI_0 : W8/0 +* VDDI_1 : W29/0 * VDDI_2 : S6/0 * VDDI_3 : S23/0 * VDDI_4 : E8/0 @@ -279,16 +279,16 @@ Power GND -* VSSE_0 : W1/0 -* VSSE_1 : W24/0 +* VSSE_0 : W7/0 +* VSSE_1 : W30/0 * VSSE_2 : S5/0 * VSSE_3 : S24/0 * VSSE_4 : E6/0 * VSSE_5 : E24/0 * VSSE_6 : N6/0 * VSSE_7 : N24/0 -* VSSI_0 : W3/0 -* VSSI_1 : W22/0 +* VSSI_0 : W9/0 +* VSSI_1 : W28/0 * VSSI_2 : S7/0 * VSSI_3 : S22/0 * VSSI_4 : E9/0 @@ -310,22 +310,22 @@ GND ## GPIOE -* GPIOE_E0 33 E1/0 -* GPIOE_E1 34 E2/0 -* GPIOE_E2 35 E3/0 -* GPIOE_E3 36 E4/0 -* GPIOE_E4 37 E5/0 -* GPIOE_E5 42 E10/0 -* GPIOE_E6 43 E11/0 -* GPIOE_E7 44 E12/0 -* GPIOE_E8 49 E17/0 -* GPIOE_E9 50 E18/0 -* GPIOE_E10 51 E19/0 -* GPIOE_E11 52 E20/0 -* GPIOE_E12 53 E21/0 -* GPIOE_E13 58 E26/0 -* GPIOE_E14 59 E27/0 -* GPIOE_E15 60 E28/0 +* GPIOE_E0 32 E0/0 +* GPIOE_E1 33 E1/0 +* GPIOE_E2 34 E2/0 +* GPIOE_E3 35 E3/0 +* GPIOE_E4 36 E4/0 +* GPIOE_E5 37 E5/0 +* GPIOE_E6 42 E10/0 +* GPIOE_E7 43 E11/0 +* GPIOE_E8 44 E12/0 +* GPIOE_E9 49 E17/0 +* GPIOE_E10 50 E18/0 +* GPIOE_E11 51 E19/0 +* GPIOE_E12 52 E20/0 +* GPIOE_E13 53 E21/0 +* GPIOE_E14 58 E26/0 +* GPIOE_E15 59 E27/0 ## JTAG @@ -339,9 +339,9 @@ GND ## EINT -* EINT_0 61 E29/0 -* EINT_1 62 E30/0 -* EINT_2 63 E31/0 +* EINT_0 60 E28/0 +* EINT_1 61 E29/0 +* EINT_2 62 E30/0 ## VDD @@ -374,15 +374,15 @@ GND * SYS_PLLSELA0 29 N29/0 * SYS_PLLSELA1 30 N30/0 * SYS_PLLTESTOUT 31 N31/0 -* SYS_PLLVCOUT 32 E0/0 +* SYS_PLLVCOUT 63 E31/0 ## MTWI I2C. -* MTWI_SDA 100 W4/0 -* MTWI_SCL 101 W5/0 +* MTWI_SDA 106 W10/0 +* MTWI_SCL 107 W11/0 ## MSPI0 @@ -413,27 +413,27 @@ I2C. * SDR_CASn 83 S19/0 * SDR_WEn 84 S20/0 * SDR_CSn0 85 S21/0 -* SDR_DQM0 102 W6/0 -* SDR_D0 103 W7/0 -* SDR_D1 104 W8/0 -* SDR_D2 105 W9/0 -* SDR_D3 106 W10/0 -* SDR_D4 107 W11/0 -* SDR_D5 108 W12/0 -* SDR_D6 109 W13/0 -* SDR_D7 110 W14/0 -* SDR_BA0 111 W15/0 -* SDR_BA1 112 W16/0 -* SDR_AD0 113 W17/0 -* SDR_AD1 114 W18/0 -* SDR_AD2 115 W19/0 -* SDR_AD3 116 W20/0 -* SDR_AD4 122 W26/0 -* SDR_AD5 123 W27/0 -* SDR_AD6 124 W28/0 -* SDR_AD7 125 W29/0 -* SDR_AD8 126 W30/0 -* SDR_AD9 127 W31/0 +* SDR_AD9 96 W0/0 +* SDR_AD8 97 W1/0 +* SDR_AD7 98 W2/0 +* SDR_AD6 99 W3/0 +* SDR_AD5 100 W4/0 +* SDR_AD4 101 W5/0 +* SDR_DQM0 108 W12/0 +* SDR_D0 109 W13/0 +* SDR_D1 110 W14/0 +* SDR_D2 111 W15/0 +* SDR_D3 112 W16/0 +* SDR_D4 113 W17/0 +* SDR_D5 114 W18/0 +* SDR_D6 115 W19/0 +* SDR_D7 116 W20/0 +* SDR_BA0 117 W21/0 +* SDR_BA1 118 W22/0 +* SDR_AD0 119 W23/0 +* SDR_AD1 120 W24/0 +* SDR_AD2 121 W25/0 +* SDR_AD3 122 W26/0 ## Unused Pinouts (spare as GPIO) for 'Libre-SOC 180nm' @@ -447,14 +447,14 @@ I2C. | 87 | S VDDI_3 | | | | | 88 | S VSSE_3 | | | | | 89 | S VDDE_3 | | | | -| 96 | W VDDE_0 | | | | -| 97 | W VSSE_0 | | | | -| 98 | W VDDI_0 | | | | -| 99 | W VSSI_0 | | | | -| 118 | W VSSI_1 | | | | -| 119 | W VDDI_1 | | | | -| 120 | W VSSE_1 | | | | -| 121 | W VDDE_1 | | | | +| 102 | W VDDE_0 | | | | +| 103 | W VSSE_0 | | | | +| 104 | W VDDI_0 | | | | +| 105 | W VSSI_0 | | | | +| 124 | W VSSI_1 | | | | +| 125 | W VDDI_1 | | | | +| 126 | W VSSE_1 | | | | +| 127 | W VDDE_1 | | | | # Reference Datasheets diff --git a/180nm_Oct2020/ls180.svg b/180nm_Oct2020/ls180.svg new file mode 100644 index 000000000..ec4f29875 --- /dev/null +++ b/180nm_Oct2020/ls180.svg @@ -0,0 +1,2 @@ + +Libre-SOC ls180In collaboration with LIP6.frCell Libraries by Chips4MakersP_SDRAM_A_9W1P_SDRAM_A_8W2P_SDRAM_A_7W3P_SDRAM_A_6W4P_SDRAM_A_5W5P_SDRAM_A_4W6IOPOWER_0W7IOGROUND_0W8POWER_0W9GROUND_0W10P_I2C_SDAW11P_I2C_SCLW12P_SDRAM_DM_0W13P_SDRAM_DQ_0W14P_SDRAM_DQ_1W15P_SDRAM_DQ_2W16P_SDRAM_DQ_3W17P_SDRAM_DQ_4W18P_SDRAM_DQ_5W19P_SDRAM_DQ_6W20P_SDRAM_DQ_7W21P_SDRAM_BA_0W22P_SDRAM_BA_1W23P_SDRAM_A_0W24P_SDRAM_A_1W25P_SDRAM_A_2W26P_SDRAM_A_3W27NC_0W28GROUND_1W29POWER_1W30IOGROUND_1W31IOPOWER_1W32P_GPIO_0E1P_GPIO_1E2P_GPIO_2E3P_GPIO_3E4P_GPIO_4E5P_GPIO_5E6IOGROUND_4E7IOPOWER_4E8POWER_4E9GROUND_4E10P_GPIO_6E11P_GPIO_7E12P_GPIO_8E13P_JTAG_TMSE14P_JTAG_TDIE15P_JTAG_TDOE16P_JTAG_TCKE17P_GPIO_9E18P_GPIO_10E19P_GPIO_11E20P_GPIO_12E21P_GPIO_13E22GROUND_5E23POWER_5E24IOGROUND_5E25IOPOWER_5E26P_GPIO_14E27P_GPIO_15E28P_EINT_0E29P_EINT_1E30P_EINT_2E31P_SYS_PLL_VCO_OE32NC_1N1NC_2N2NC_3N3NC_4N4NC_5N5NC_6N6IOGROUND_6N7IOPOWER_6N8POWER_6N9GROUND_6N10NC_7N11NC_8N12NC_9N13NC_10N14NC_11N15NC_12N16NC_13N17NC_14N18NC_15N19NC_16N20NC_17N21NC_18N22GROUND_7N23POWER_7N24IOGROUND_7N25IOPOWER_7N26NC_19N27SYS_RSTN28P_SYS_PLLCLKN29P_SYS_CLKSEL_0N30P_SYS_CLKSEL_1N31P_SYS_PLL_TESTOUT_ON32P_SDRAM_A_10S1P_SDRAM_A_11S2P_SDRAM_A_12S3P_SDRAM_DM_1S4IOPOWER_2S5IOGROUND_2S6POWER_2S7GROUND_2S8P_SDRAM_DQ_8S9P_SDRAM_DQ_9S10P_SDRAM_DQ_10S11P_SDRAM_DQ_11S12P_SDRAM_DQ_12S13P_SDRAM_DQ_13S14P_SDRAM_DQ_14S15P_SDRAM_DQ_15S16P_SDRAM_CLOCKS17P_SDRAM_CKES18P_SDRAM_RAS_NS19P_SDRAM_CAS_NS20P_SDRAM_WE_NS21P_SDRAM_CS_NS22GROUND_3S23POWER_3S24IOGROUND_3S25IOPOWER_3S26P_UART_TXS27P_UART_RXS28P_SPIMASTER_CLKS29P_SPIMASTER_CS_NS30P_SPIMASTER_MOSIS31P_SPIMASTER_MISOS32 \ No newline at end of file -- 2.30.2