From d8269be1ceed29d2e00829e1fd4a7bbac389d967 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Thu, 16 Apr 2015 20:15:16 +0200 Subject: [PATCH] gallium/radeon: print winsys info with R600_DEBUG=info MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Michel Dänzer --- src/gallium/drivers/radeon/r600_pipe_common.c | 27 +++++++++++++++++++ src/gallium/drivers/radeon/r600_pipe_common.h | 1 + 2 files changed, 28 insertions(+) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 2b27e0ab200..c6d79181d19 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -306,6 +306,7 @@ static const struct debug_named_value common_debug_options[] = { { "compute", DBG_COMPUTE, "Print compute info" }, { "vm", DBG_VM, "Print virtual addresses when creating resources" }, { "trace_cs", DBG_TRACE_CS, "Trace cs and write rlockup_.c file with faulty cs" }, + { "info", DBG_INFO, "Print driver information" }, /* shaders */ { "fs", DBG_FS, "Print fetch shaders" }, @@ -874,6 +875,32 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen, } } + if (rscreen->debug_flags & DBG_INFO) { + printf("pci_id = 0x%x\n", rscreen->info.pci_id); + printf("family = %i\n", rscreen->info.family); + printf("chip_class = %i\n", rscreen->info.chip_class); + printf("gart_size = %i MB\n", (int)(rscreen->info.gart_size >> 20)); + printf("vram_size = %i MB\n", (int)(rscreen->info.vram_size >> 20)); + printf("max_sclk = %i\n", rscreen->info.max_sclk); + printf("max_compute_units = %i\n", rscreen->info.max_compute_units); + printf("max_se = %i\n", rscreen->info.max_se); + printf("max_sh_per_se = %i\n", rscreen->info.max_sh_per_se); + printf("drm = %i.%i.%i\n", rscreen->info.drm_major, + rscreen->info.drm_minor, rscreen->info.drm_patchlevel); + printf("has_uvd = %i\n", rscreen->info.has_uvd); + printf("vce_fw_version = %i\n", rscreen->info.vce_fw_version); + printf("r600_num_backends = %i\n", rscreen->info.r600_num_backends); + printf("r600_clock_crystal_freq = %i\n", rscreen->info.r600_clock_crystal_freq); + printf("r600_tiling_config = 0x%x\n", rscreen->info.r600_tiling_config); + printf("r600_num_tile_pipes = %i\n", rscreen->info.r600_num_tile_pipes); + printf("r600_max_pipes = %i\n", rscreen->info.r600_max_pipes); + printf("r600_virtual_address = %i\n", rscreen->info.r600_virtual_address); + printf("r600_has_dma = %i\n", rscreen->info.r600_has_dma); + printf("r600_backend_map = %i\n", rscreen->info.r600_backend_map); + printf("r600_backend_map_valid = %i\n", rscreen->info.r600_backend_map_valid); + printf("si_tile_mode_array_valid = %i\n", rscreen->info.si_tile_mode_array_valid); + printf("cik_macrotile_mode_array_valid = %i\n", rscreen->info.cik_macrotile_mode_array_valid); + } return true; } diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index febd2a167bb..384a9a6a200 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -84,6 +84,7 @@ #define DBG_SWITCH_ON_EOP (1 << 15) #define DBG_FORCE_DMA (1 << 16) #define DBG_PRECOMPILE (1 << 17) +#define DBG_INFO (1 << 18) /* The maximum allowed bit is 20. */ #define R600_MAP_BUFFER_ALIGNMENT 64 -- 2.30.2