From d84083f64233c4edeea8d4852bbd1b2205f9b3ce Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 29 Oct 2018 15:39:51 +0100 Subject: [PATCH] boards/platforms/versaecp55g: use ftdi serial pins --- litex/boards/platforms/versaecp55g.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/litex/boards/platforms/versaecp55g.py b/litex/boards/platforms/versaecp55g.py index 7b0fb464..8ecb2633 100644 --- a/litex/boards/platforms/versaecp55g.py +++ b/litex/boards/platforms/versaecp55g.py @@ -29,10 +29,11 @@ _io = [ ("user_dip_btn", 7, Pins("K20"), IOStandard("LVCMOS25")), ("serial", 0, - Subsignal("tx", Pins("A12"), IOStandard("LVCMOS33")), # X4 IO0 - Subsignal("rx", Pins("A13"), IOStandard("LVCMOS33")), # X4 IO1 + Subsignal("rx", Pins("C11"), IOStandard("LVCMOS33")), + Subsignal("tx", Pins("A11"), IOStandard("LVCMOS33")), ), + ("eth_clocks", 0, Subsignal("tx", Pins("P19")), Subsignal("rx", Pins("L20")), -- 2.30.2