From d8439381dc08d50853ca762a0906b2a87ba03ecd Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 27 Oct 2022 12:15:44 +0100 Subject: [PATCH] https://bugs.libre-soc.org/show_bug.cgi?id=966#c4 corrections to shadd --- openpower/isa/bitmanip.mdwn | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/openpower/isa/bitmanip.mdwn b/openpower/isa/bitmanip.mdwn index 89515ec9..5d404488 100644 --- a/openpower/isa/bitmanip.mdwn +++ b/openpower/isa/bitmanip.mdwn @@ -111,12 +111,8 @@ Z23-Form Pseudo-code: n <- (RB) - switch (sm) - case (0): sum[0:XLEN-1] = (n[0:XLEN-1-1] || [0]*1) + (RA) - case (1): sum[0:XLEN-1] = (n[0:XLEN-2-1] || [0]*2) + (RA) - case (2): sum[0:XLEN-1] = (n[0:XLEN-3-1] || [0]*3) + (RA) - default: sum[0:XLEN-1] = (n[0:XLEN-4-1] || [0]*4) + (RA) - RT <- sum + m <- sm + 1 + RT <- (n[m:XLEN-1] || [0]*m) + (RA) Special Registers Altered: @@ -132,12 +128,8 @@ Z23-Form Pseudo-code: n <- ([0]*(XLEN/2)) || (RB)[XLEN/2:XLEN-1] - switch (sm) - case (0): sum[0:XLEN-1] = (n[0:XLEN-1-1] || [0]*1) + (RA) - case (1): sum[0:XLEN-1] = (n[0:XLEN-2-1] || [0]*2) + (RA) - case (2): sum[0:XLEN-1] = (n[0:XLEN-3-1] || [0]*3) + (RA) - default: sum[0:XLEN-1] = (n[0:XLEN-4-1] || [0]*4) + (RA) - RT <- sum + m <- sm + 1 + RT <- (n[m:XLEN-1] || [0]*m) + (RA) Special Registers Altered: -- 2.30.2