From d843d7ca34a11802c15bf99912c1989d52a2e3d1 Mon Sep 17 00:00:00 2001
From: Gavin Romig-Koch <gavin@redhat.com>
Date: Mon, 9 Mar 1998 20:22:45 +0000
Subject: [PATCH] 	* mips/vr4320.igen: Mark the insn in here as vr4320
 only. 	Reorder the insns.

---
 sim/.Sanitize        | 28 +++++++++++++++++++++++
 sim/mips/vr4320.igen | 54 +++++++++++++++++++++++++-------------------
 2 files changed, 59 insertions(+), 23 deletions(-)

diff --git a/sim/.Sanitize b/sim/.Sanitize
index 3df70e7b60e..531d802c843 100644
--- a/sim/.Sanitize
+++ b/sim/.Sanitize
@@ -151,6 +151,34 @@ else
         done
 fi
 
+vr4320_files="ChangeLog"
+if ( echo $* | grep keep\-vr4320 > /dev/null ) ; then
+        for i in $vr4320_files ; do
+                if test ! -d $i && (grep sanitize-vr4320 $i > /dev/null) ; then
+                        if [ -n "${verbose}" ] ; then
+                                echo Keeping vr4320 stuff in $i
+                        fi
+                fi
+        done
+else
+        for i in $vr4320_files ; do
+                if test ! -d $i && (grep sanitize-vr4320 $i > /dev/null) ; then
+                        if [ -n "${verbose}" ] ; then
+                                echo Removing traces of \"vr4320\" from $i...
+                        fi
+                        cp $i new
+                        sed '/start\-sanitize\-vr4320/,/end-\sanitize\-vr4320/d' < $i > new
+                        if [ -n "${safe}" -a ! -f .Recover/$i ] ; then
+                                if [ -n "${verbose}" ] ; then
+                                        echo Caching $i in .Recover...
+                                fi
+                                mv $i .Recover
+                        fi
+                        mv new $i
+                fi
+        done
+fi
+
 for i in * ; do
         if test ! -d $i && (grep sanitize $i > /dev/null) ; then
                 echo '***' Some mentions of Sanitize are still left in $i! 1>&2
diff --git a/sim/mips/vr4320.igen b/sim/mips/vr4320.igen
index d0403634445..7dd3776d248 100644
--- a/sim/mips/vr4320.igen
+++ b/sim/mips/vr4320.igen
@@ -47,10 +47,30 @@
 
 
 
+// Multiply, Accumulate
+000000,5.RS,5.RT,00000,00000,101000::::MAC
+"mac r<RS>, r<RT>"
+*vr4320:
+{
+  SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
+}
+
+// D-Multiply, Accumulate
+000000,5.RS,5.RT,00000,00000,101001::::DMAC
+"dmac r<RS>, r<RT>"
+*vr4320:
+{
+  LO = 99 + SignedMultiply (SD_, GPR[RS], GPR[RT]);
+}
+
+
+
+
+
 // Multiply and Move LO.
 000000,5.RS,5.RT,5.RD,00100,101000::::MUL
 "mul r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
+*vr4320:
 {
   SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
   GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
@@ -59,7 +79,7 @@
 // Unsigned Multiply and Move LO.
 000000,5.RS,5.RT,5.RD,00101,101000::::MULU
 "mulu r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
+*vr4320:
 {
   SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
   GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
@@ -68,42 +88,30 @@
 // Multiply and Move HI.
 000000,5.RS,5.RT,5.RD,01100,101000::::MULHI
 "mulhi r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
+*vr4320:
 {
-  SET_MulAcc (SD_, 0 + SignedMultiply   (SD_, GPR[RS], GPR[RT]));
+  SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 }
 
 // Unsigned Multiply and Move HI.
 000000,5.RS,5.RT,5.RD,01101,101000::::MULHIU
 "mulhiu r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
+*vr4320:
 {
   SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 }
 
 
-// Multiply, Accumulate
-000000,5.RS,5.RT,00000,00000,101000::::MAC
-"mac r<RS>, r<RT>"
-*vr4320:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
-}
 
-// D-Multiply, Accumulate
-000000,5.RS,5.RT,00000,00000,101001::::DMAC
-"dmac r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-{
-  LO = MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]);
-}
+
+
 
 // Multiply, Accumulate and Move LO.
 000000,5.RS,5.RT,5.RD,00010,101000::::MACC
 "macc r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
+*vr4320:
 {
   SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
   GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
@@ -112,7 +120,7 @@
 // Unsigned Multiply, Accumulate and Move LO.
 000000,5.RS,5.RT,5.RD,00011,101000::::MACCU
 "maccu r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
+*vr4320:
 {
   SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
   GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
@@ -121,7 +129,7 @@
 // Multiply, Accumulate and Move HI.
 000000,5.RS,5.RT,5.RD,01010,101000::::MACCHI
 "macchi r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
+*vr4320:
 {
   SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
@@ -130,7 +138,7 @@
 // Unsigned Multiply, Accumulate and Move HI.
 000000,5.RS,5.RT,5.RD,01011,101000::::MACCHIU
 "macchiu r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
+*vr4320:
 {
   SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-- 
2.30.2