From d8567960f133b3da7a4264706398ef9e9da6b813 Mon Sep 17 00:00:00 2001 From: Michael Nolan Date: Sun, 10 May 2020 12:26:27 -0400 Subject: [PATCH] Reduce BMC depth on proof_main_stage.py --- src/soc/alu/formal/proof_main_stage.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/alu/formal/proof_main_stage.py b/src/soc/alu/formal/proof_main_stage.py index df73815b..3ce8f19a 100644 --- a/src/soc/alu/formal/proof_main_stage.py +++ b/src/soc/alu/formal/proof_main_stage.py @@ -100,8 +100,8 @@ class Driver(Elaboratable): class ALUTestCase(FHDLTestCase): def test_formal(self): module = Driver() - self.assertFormal(module, mode="bmc", depth=4) - self.assertFormal(module, mode="cover", depth=4) + self.assertFormal(module, mode="bmc", depth=2) + self.assertFormal(module, mode="cover", depth=2) def test_ilang(self): dut = Driver() vl = rtlil.convert(dut, ports=[]) -- 2.30.2