From d969caf8295b75420b532a7c9ebe89eb38194f1b Mon Sep 17 00:00:00 2001 From: Richard Kenner Date: Mon, 11 Oct 1993 07:43:24 -0400 Subject: [PATCH] Define SHIFT_COUNT_TRUNCATED to have a value of 1. From-SVN: r5732 --- gcc/config/a29k/a29k.h | 4 ++-- gcc/config/alpha/alpha.h | 4 ++-- gcc/config/fx80/fx80.h | 7 +++---- gcc/config/i960/i960.h | 7 +++---- gcc/config/mips/mips.h | 10 +++------- gcc/config/pa/pa.h | 4 ++-- gcc/config/pyr/pyr.h | 7 +++---- gcc/config/rs6000/rs6000.h | 4 ++-- gcc/config/sparc/sparc.h | 7 +++---- gcc/config/tahoe/tahoe.h | 2 +- gcc/config/we32k/we32k.h | 7 +++---- 11 files changed, 27 insertions(+), 36 deletions(-) diff --git a/gcc/config/a29k/a29k.h b/gcc/config/a29k/a29k.h index d7b600054c3..1ee727aaf6e 100644 --- a/gcc/config/a29k/a29k.h +++ b/gcc/config/a29k/a29k.h @@ -1276,9 +1276,9 @@ extern char *a29k_function_name; but a CALL with constant address is cheap. */ #define NO_FUNCTION_CSE -/* Define this if shift instructions ignore all but the low-order +/* Define this to be nonzero if shift instructions ignore all but the low-order few bits. */ -#define SHIFT_COUNT_TRUNCATED +#define SHIFT_COUNT_TRUNCATED 1 /* Compute the cost of computing a constant rtl expression RTX whose rtx-code is CODE. The body of this macro is a portion diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 3b76cd0cb26..4a6756d998a 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -1279,9 +1279,9 @@ extern char *current_function_name; #define NO_FUNCTION_CSE -/* Define this if shift instructions ignore all but the low-order +/* Define this to be nonzero if shift instructions ignore all but the low-order few bits. */ -#define SHIFT_COUNT_TRUNCATED +#define SHIFT_COUNT_TRUNCATED 1 /* Compute the cost of computing a constant rtl expression RTX whose rtx-code is CODE. The body of this macro is a portion diff --git a/gcc/config/fx80/fx80.h b/gcc/config/fx80/fx80.h index 68033985d0c..8c9ba725e75 100644 --- a/gcc/config/fx80/fx80.h +++ b/gcc/config/fx80/fx80.h @@ -841,10 +841,9 @@ extern enum reg_class regno_reg_class[]; /* Nonzero if access to memory by bytes is slow and undesirable. */ #define SLOW_BYTE_ACCESS 0 -/* Define if shifts truncate the shift count - which implies one can omit a sign-extension or zero-extension - of a shift count. */ -#define SHIFT_COUNT_TRUNCATED +/* Define this to be nonzero if shift instructions ignore all but the low-order + few bits. */ +#define SHIFT_COUNT_TRUNCATED 1 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ diff --git a/gcc/config/i960/i960.h b/gcc/config/i960/i960.h index f1e5d76b97a..d95e8c09207 100644 --- a/gcc/config/i960/i960.h +++ b/gcc/config/i960/i960.h @@ -1075,10 +1075,9 @@ extern struct rtx_def *legitimize_address (); #define STORE_FLAG_VALUE 1 -/* Define if shifts truncate the shift count - which implies one can omit a sign-extension or zero-extension - of a shift count. */ -#define SHIFT_COUNT_TRUNCATED +/* Define this to be nonzero if shift instructions ignore all but the low-order + few bits. */ +#define SHIFT_COUNT_TRUNCATED 1 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 59af3dabc95..80314f45b8b 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2389,13 +2389,9 @@ while (0) /* Define this if zero-extension is slow (more than one real instruction). */ #define SLOW_ZERO_EXTEND -/* Define if shifts truncate the shift count - which implies one can omit a sign-extension or zero-extension - of a shift count. - - Only 5 bits are used in SLLV and SRLV */ - -#define SHIFT_COUNT_TRUNCATED +/* Define this to be nonzero if shift instructions ignore all but the low-order + few bits. */ +#define SHIFT_COUNT_TRUNCATED 1 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 7d5f4d4b89b..74aca477984 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -1427,9 +1427,9 @@ while (0) but a CALL with constant address is cheap. */ #define NO_FUNCTION_CSE -/* Define this if shift instructions ignore all but the low-order +/* Define this to be nonzero if shift instructions ignore all but the low-order few bits. */ -#define SHIFT_COUNT_TRUNCATED +#define SHIFT_COUNT_TRUNCATED 1 /* Use atexit for static constructors/destructors, instead of defining our own exit function. */ diff --git a/gcc/config/pyr/pyr.h b/gcc/config/pyr/pyr.h index 78f0705907b..e9f9bbd4d80 100644 --- a/gcc/config/pyr/pyr.h +++ b/gcc/config/pyr/pyr.h @@ -1029,10 +1029,9 @@ extern int current_function_calls_alloca; /* 1 if byte access requires more than one instruction */ #define SLOW_BYTE_ACCESS 0 -/* Define if shifts truncate the shift count - which implies one can omit a sign-extension or zero-extension - of a shift count. */ -#define SHIFT_COUNT_TRUNCATED +/* Define this to be nonzero if shift instructions ignore all but the low-order + few bits. */ +#define SHIFT_COUNT_TRUNCATED 1 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 7e5a9742c07..deed036450e 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1341,9 +1341,9 @@ struct rs6000_args {int words, fregno, nargs_prototype; }; but a CALL with constant address is cheap. */ #define NO_FUNCTION_CSE -/* Define this if shift instructions ignore all but the low-order +/* Define this to be nonzero if shift instructions ignore all but the low-order few bits. */ -#define SHIFT_COUNT_TRUNCATED +#define SHIFT_COUNT_TRUNCATED 1 /* Use atexit for static constructors/destructors, instead of defining our own exit function. */ diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 853f8120b06..a60f80b5639 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -1383,10 +1383,9 @@ extern struct rtx_def *legitimize_pic_address (); /* When a prototype says `char' or `short', really pass an `int'. */ #define PROMOTE_PROTOTYPES -/* Define if shifts truncate the shift count - which implies one can omit a sign-extension or zero-extension - of a shift count. */ -#define SHIFT_COUNT_TRUNCATED +/* Define this to be nonzero if shift instructions ignore all but the low-order + few bits. */ +#define SHIFT_COUNT_TRUNCATED 1 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ diff --git a/gcc/config/tahoe/tahoe.h b/gcc/config/tahoe/tahoe.h index 2f32ddeb1f4..607c98824a2 100644 --- a/gcc/config/tahoe/tahoe.h +++ b/gcc/config/tahoe/tahoe.h @@ -621,7 +621,7 @@ enum reg_class {NO_REGS,GENERAL_REGS,FPP_REG,ALL_REGS,LIM_REG_CLASSES}; /* any bits higher than the low 4 are ignored in the shift count */ /* so don't bother zero extending or sign extending them */ -#define SHIFT_COUNT_TRUNCATED +#define SHIFT_COUNT_TRUNCATED 1 /* we don't need to officially convert from one fixed type to another */ /* in order to use it as that type. We can just assume it's the same */ diff --git a/gcc/config/we32k/we32k.h b/gcc/config/we32k/we32k.h index 42457fd3e73..a48e052e6a8 100644 --- a/gcc/config/we32k/we32k.h +++ b/gcc/config/we32k/we32k.h @@ -647,10 +647,9 @@ enum reg_class { NO_REGS, GENERAL_REGS, /* Nonzero if access to memory by bytes is slow and undesirable. */ #define SLOW_BYTE_ACCESS 0 -/* Define if shifts truncate the shift count - which implies one can omit a sign-extension or zero-extension - of a shift count. */ -#define SHIFT_COUNT_TRUNCATED +/* Define this to be nonzero if shift instructions ignore all but the low-order + few bits. */ +#define SHIFT_COUNT_TRUNCATED 1 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */ -- 2.30.2