From da0b9df9a8ece8d062b4fed47e0d67d007c8696a Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Thu, 9 Apr 2015 09:28:54 +0200 Subject: [PATCH] re PR rtl-optimization/65693 (ICE in assign_by_spills, at lra-assigns.c:1419) PR target/65693 * config/i386/i386.md (*udivmod4_pow2): Allow any pow2 integer in between 2 and 0x80000000U inclusive. * gcc.target/i386/pr65693.c: New test. From-SVN: r221942 --- gcc/ChangeLog | 6 ++++++ gcc/config/i386/i386.md | 2 +- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/pr65693.c | 13 +++++++++++++ 4 files changed, 25 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr65693.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e246510b3f6..7a2a9f8ef53 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-04-09 Jakub Jelinek + + PR target/65693 + * config/i386/i386.md (*udivmod4_pow2): Allow + any pow2 integer in between 2 and 0x80000000U inclusive. + 2015-04-08 Segher Boessenkool PR rtl-optimization/65693 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index cf63afde16e..e1c82fefc0d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -7340,7 +7340,7 @@ (set (match_operand:SWI48 1 "register_operand" "=r") (umod:SWI48 (match_dup 2) (match_dup 3))) (clobber (reg:CC FLAGS_REG))] - "UINTVAL (operands[3]) - 2 < * BITS_PER_UNIT + "IN_RANGE (INTVAL (operands[3]), 2, HOST_WIDE_INT_UC (0x80000000)) && (UINTVAL (operands[3]) & (UINTVAL (operands[3]) - 1)) == 0" "#" "&& 1" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ba6f84142d8..667d42e29ba 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-04-09 Jakub Jelinek + + PR target/65693 + * gcc.target/i386/pr65693.c: New test. + 2015-04-08 Ilya Enkovich * gcc.dg/lto/chkp-static-bounds_0.c: New. diff --git a/gcc/testsuite/gcc.target/i386/pr65693.c b/gcc/testsuite/gcc.target/i386/pr65693.c new file mode 100644 index 00000000000..bc380e483ff --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr65693.c @@ -0,0 +1,13 @@ +/* PR target/65693 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int a; + +void +foo (int (*fn) (int, int, int), unsigned int b) +{ + unsigned long *c = (unsigned long *) __builtin_alloca (b); + a = *c; + register int d asm ("edx") = fn (0, 0, d); +} -- 2.30.2