From daa69e87f5c2455fc7c3bc76e6916abdaf97fde6 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 29 Apr 2023 14:00:22 +0100 Subject: [PATCH] add notes on ls016 twin-butterfly instructions --- openpower/sv/rfc/ls016.mdwn | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/openpower/sv/rfc/ls016.mdwn b/openpower/sv/rfc/ls016.mdwn index 83bf4814e..e1630f8f5 100644 --- a/openpower/sv/rfc/ls016.mdwn +++ b/openpower/sv/rfc/ls016.mdwn @@ -1,4 +1,4 @@ -# RFC ls015 DCT / FFT Twin Butterfly instructions +# RFC ls016 DCT / FFT Twin Butterfly instructions **URLs**: @@ -70,7 +70,15 @@ are often loop-unrolled, resulting in L1 I-Cache stripmining. **Notes and Observations**: -1. TODO +1. Whilst it is easy to justify these high-value instructions they are + sufficiently complex as to warrant placement as optional SFFS in + the new EXT2xx area (marked as Vectoriseable). +2. Although they are 3-in 2-out the actual encoding is as double-overwrite + reducing the actual number of operands down to three (RT RA and RB) + where RT is a Read-Modify-Write and an additional RS is implicit. +* Although desirable (particularly to detect overflow) Rc=1 is hard to + conceptualise. It is likely that instead, Simple-V "saturation" if + enabled will create an Rc=1 CR.SO flag (including SVP64Single). **Changes** @@ -99,7 +107,7 @@ Add the following entries to Book I 1.6.1 Word Instruction Formats: ``` |0 |6 |11 |16 |21 |26 |31 | - | PO | RT | RA | RB | SH | XO |/ | + | PO | RT | RA | RB | SH | XO |Rc | ``` Add the following new fields to Book I 1.6.2 Word Instruction Fields: -- 2.30.2