From db0e53af74beafa0ba07b200396bfe12fa9f5c89 Mon Sep 17 00:00:00 2001 From: Keith Whitwell Date: Fri, 1 Sep 2006 14:18:06 +0000 Subject: [PATCH] fix a couple of cases where a message reg is used as an instruction source. --- src/mesa/drivers/dri/i965/brw_eu_emit.c | 4 ++++ src/mesa/drivers/dri/i965/brw_vs_emit.c | 28 +++++++++++++++++++------ 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 791eaab0cc7..6425c91450c 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -94,6 +94,8 @@ static void brw_set_dest( struct brw_instruction *insn, static void brw_set_src0( struct brw_instruction *insn, struct brw_reg reg ) { + assert(reg.file != BRW_MESSAGE_REGISTER_FILE); + insn->bits1.da1.src0_reg_file = reg.file; insn->bits1.da1.src0_reg_type = reg.type; insn->bits2.da1.src0_abs = reg.abs; @@ -165,6 +167,8 @@ static void brw_set_src0( struct brw_instruction *insn, static void brw_set_src1( struct brw_instruction *insn, struct brw_reg reg ) { + assert(reg.file != BRW_MESSAGE_REGISTER_FILE); + insn->bits1.da1.src1_reg_file = reg.file; insn->bits1.da1.src1_reg_type = reg.type; insn->bits3.da1.src1_abs = reg.abs; diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index 96f9f5bd81b..cfade7c992a 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -529,6 +529,11 @@ static void emit_lit_noalias( struct brw_vs_compile *c, { struct brw_compile *p = &c->func; struct brw_instruction *if_insn; + struct brw_reg tmp = dst; + GLboolean need_tmp = (dst.file != BRW_GENERAL_REGISTER_FILE); + + if (need_tmp) + tmp = get_tmp(c); brw_MOV(p, brw_writemask(dst, WRITEMASK_YZ), brw_imm_f(0)); brw_MOV(p, brw_writemask(dst, WRITEMASK_XW), brw_imm_f(1)); @@ -544,13 +549,13 @@ static void emit_lit_noalias( struct brw_vs_compile *c, brw_MOV(p, brw_writemask(dst, WRITEMASK_Y), brw_swizzle1(arg0,0)); brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_G, brw_swizzle1(arg0,1), brw_imm_f(0)); - brw_MOV(p, brw_writemask(dst, WRITEMASK_Z), brw_swizzle1(arg0,1)); + brw_MOV(p, brw_writemask(tmp, WRITEMASK_Z), brw_swizzle1(arg0,1)); brw_set_predicate_control(p, BRW_PREDICATE_NONE); emit_math2(c, BRW_MATH_FUNCTION_POW, brw_writemask(dst, WRITEMASK_Z), - brw_swizzle1(dst, 2), + brw_swizzle1(tmp, 2), brw_swizzle1(arg0, 3), BRW_MATH_PRECISION_PARTIAL); } @@ -691,8 +696,14 @@ static void emit_swz( struct brw_vs_compile *c, GLuint ones_mask = 0; GLuint src_mask = 0; GLubyte src_swz[4]; + GLboolean need_tmp = (src.NegateBase && + dst.file != BRW_GENERAL_REGISTER_FILE); + struct brw_reg tmp = dst; GLuint i; + if (need_tmp) + tmp = get_tmp(c); + for (i = 0; i < 4; i++) { if (dst.dw1.bits.writemask & (1<