From db7ccee202ecc15386eb283a83f75530f7ed856a Mon Sep 17 00:00:00 2001 From: Georg-Johann Lay Date: Fri, 29 Jul 2011 11:27:39 +0000 Subject: [PATCH] re PR target/49687 ([avr] Missed optimization for widening MUL) PR target/49687 * config/avr/avr.md (mulsi3, *mulsi3, mulusi3, mulssi3, mulohisi3, mulhisi3, umulhisi3, usmulhisi3, *mulsi3): Add X to register footprint: Clobber r26/r27. From-SVN: r176923 --- gcc/ChangeLog | 8 ++++++++ gcc/config/avr/avr.md | 9 +++++++++ 2 files changed, 17 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fad87a05171..d3e0ac78a8e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2011-07-29 Georg-Johann Lay + + PR target/49687 + * config/avr/avr.md (mulsi3, *mulsi3, mulusi3, + mulssi3, mulohisi3, mulhisi3, umulhisi3, usmulhisi3, + *mulsi3): + Add X to register footprint: Clobber r26/r27. + 2011-07-29 Richard Guenther * builtins.c (fold_builtin_signbit): Build the comparison diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 2c215fdecc5..55a883e9ab3 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -1373,6 +1373,7 @@ [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (match_operand:SI 1 "register_operand" "") (match_operand:SI 2 "nonmemory_operand" ""))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" { @@ -1395,6 +1396,7 @@ [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (match_operand:SI 1 "pseudo_register_operand" "r") (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1431,6 +1433,7 @@ [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (zero_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r")) (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1466,6 +1469,7 @@ [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (sign_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r")) (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1509,6 +1513,7 @@ (mult:SI (not:SI (zero_extend:SI (not:HI (match_operand:HI 1 "pseudo_register_operand" "r")))) (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1528,6 +1533,7 @@ [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "")) (sign_extend:SI (match_operand:HI 2 "register_operand" "")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" "") @@ -1536,6 +1542,7 @@ [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "")) (zero_extend:SI (match_operand:HI 2 "register_operand" "")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" "") @@ -1544,6 +1551,7 @@ [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "")) (sign_extend:SI (match_operand:HI 2 "register_operand" "")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" "") @@ -1557,6 +1565,7 @@ [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (any_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r")) (any_extend2:SI (match_operand:QIHI2 2 "pseudo_register_operand" "r")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } -- 2.30.2