From db90619067cac88165e78d5630a4dad6232195bc Mon Sep 17 00:00:00 2001 From: "William D. Jones" Date: Mon, 24 Sep 2018 11:04:57 -0400 Subject: [PATCH] integration/builder: Add LiteX define to generated variables (to distinguish MiSoC and LiteX). --- litex/soc/integration/builder.py | 2 ++ 1 file changed, 2 insertions(+) mode change 100644 => 100755 litex/soc/integration/builder.py diff --git a/litex/soc/integration/builder.py b/litex/soc/integration/builder.py old mode 100644 new mode 100755 index dab50d0c..ddeccfac --- a/litex/soc/integration/builder.py +++ b/litex/soc/integration/builder.py @@ -70,6 +70,8 @@ class Builder: variables_contents.append("{}={}\n".format(k, _makefile_escape(v))) for k, v in cpu_interface.get_cpu_mak(self.soc.cpu): define(k, v) + # Distinguish between LiteX and MiSoC. + define("LITEX", "1") # Distinguish between applications running from main RAM and # flash for user-provided software packages. if "main_ram" in (m[0] for m in memory_regions): -- 2.30.2