From dbcd633040939565f91eedac6ea313503ac9f0a5 Mon Sep 17 00:00:00 2001 From: Chris Forbes Date: Sun, 27 Oct 2013 12:09:51 +1300 Subject: [PATCH] i965: Gen4-5: Don't enable hardware alpha test with MRT We have to do this in the shader instead, since these gens lack an independent RT0 alpha value in their render target write messages. Signed-off-by: Chris Forbes Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/i965/brw_cc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index 6f85f6355cb..53466e714ec 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -187,7 +187,8 @@ static void upload_cc_unit(struct brw_context *brw) eqA != eqRGB); } - if (ctx->Color.AlphaEnabled) { + /* _NEW_BUFFERS */ + if (ctx->Color.AlphaEnabled && ctx->DrawBuffer->_NumColorDrawBuffers <= 1) { cc->cc3.alpha_test = 1; cc->cc3.alpha_test_func = intel_translate_compare_func(ctx->Color.AlphaFunc); -- 2.30.2