From dc6bbe2dd0eb9ba421c8454b3b6179a6b0452b40 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 3 Oct 2016 15:37:19 +0200 Subject: [PATCH] gallium/radeon: use r600_gfx_write_event_eop everywhere MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeon/r600_pipe_common.c | 4 +++- src/gallium/drivers/radeon/r600_query.c | 17 ++++------------- src/gallium/drivers/radeonsi/si_state_draw.c | 12 +++--------- 3 files changed, 10 insertions(+), 23 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 835008360a6..1a7a712beb2 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -122,7 +122,9 @@ void r600_gfx_write_event_eop(struct r600_common_context *ctx, radeon_emit(cs, new_fence); /* immediate data */ radeon_emit(cs, 0); /* unused */ - r600_emit_reloc(ctx, &ctx->gfx, buf, RADEON_USAGE_WRITE, RADEON_PRIO_QUERY); + if (buf) + r600_emit_reloc(ctx, &ctx->gfx, buf, RADEON_USAGE_WRITE, + RADEON_PRIO_QUERY); } unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen) diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c index ac71a4358e0..a5c8595ea12 100644 --- a/src/gallium/drivers/radeon/r600_query.c +++ b/src/gallium/drivers/radeon/r600_query.c @@ -557,12 +557,8 @@ static void r600_query_hw_do_emit_start(struct r600_common_context *ctx, radeon_emit(cs, (va >> 32) & 0xFFFF); break; case PIPE_QUERY_TIME_ELAPSED: - radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); - radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) | EVENT_INDEX(5)); - radeon_emit(cs, va); - radeon_emit(cs, EOP_DATA_SEL(3) | ((va >> 32) & 0xFFFF)); - radeon_emit(cs, 0); - radeon_emit(cs, 0); + r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS, + 0, 3, NULL, va, 0, 0); break; case PIPE_QUERY_PIPELINE_STATISTICS: radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); @@ -643,13 +639,8 @@ static void r600_query_hw_do_emit_stop(struct r600_common_context *ctx, va += 8; /* fall through */ case PIPE_QUERY_TIMESTAMP: - radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); - radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) | EVENT_INDEX(5)); - radeon_emit(cs, va); - radeon_emit(cs, EOP_DATA_SEL(3) | ((va >> 32) & 0xFFFF)); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - + r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS, + 0, 3, NULL, va, 0, 0); fence_va = va + 8; break; case PIPE_QUERY_PIPELINE_STATISTICS: { diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index d18137b6691..c0e2642ba3d 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -740,15 +740,9 @@ void si_emit_cache_flush(struct si_context *sctx) S_0085F0_CB7_DEST_BASE_ENA(1); /* Necessary for DCC */ - if (rctx->chip_class >= VI) { - radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); - radeon_emit(cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_CB_DATA_TS) | - EVENT_INDEX(5)); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - } + if (rctx->chip_class == VI) + r600_gfx_write_event_eop(rctx, V_028A90_FLUSH_AND_INV_CB_DATA_TS, + 0, 0, NULL, 0, 0, 0); } if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB) { cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | -- 2.30.2