From dcd2b0f660e01a02936074bf5d8f260319c0e84e Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 12 Dec 2020 18:21:55 +0000 Subject: [PATCH] --- openpower/sv/svp_rewrite/svp64/discussion.mdwn | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/openpower/sv/svp_rewrite/svp64/discussion.mdwn b/openpower/sv/svp_rewrite/svp64/discussion.mdwn index c7409aebe..6b8afe2bf 100644 --- a/openpower/sv/svp_rewrite/svp64/discussion.mdwn +++ b/openpower/sv/svp_rewrite/svp64/discussion.mdwn @@ -38,7 +38,8 @@ something like: mode: * zmode: 2 bit src pred zero mode, dest pred zero mode -* ffirst: 3 bit. EN (and CR index bit 0-3, applicable when Rc=1) +* ffirst: 3 bit. EN (and CR index bit 0-3, applicable when Rc=1). + operations that do not have Rc may take bit 1 to mean "invert test" ## twin predication, CR based. -- 2.30.2