From dcf0dde488b81894124a6bb181c98e215d4dfdeb Mon Sep 17 00:00:00 2001 From: Jim Wilson Date: Fri, 13 Nov 2020 18:12:24 -0800 Subject: [PATCH] Asan changes for RISC-V. We have only riscv64 asan support, there is no riscv32 support as yet. So I need to be able to conditionally enable asan support for the riscv target. I implemented this by returning zero from the asan_shadow_offset function. This requires a change to toplev.c and docs in target.def. gcc/ * config/riscv/riscv.c (riscv_asan_shadow_offset): New. (TARGET_ASAN_SHADOW_OFFSET): New. * doc/tm.texi: Regenerated. * target.def (asan_shadow_offset); Mention that it can return zero. * toplev.c (process_options): Check for and handle zero return from targetm.asan_shadow_offset call. Co-Authored-By: cooper.joshua --- gcc/config/riscv/riscv.c | 16 ++++++++++++++++ gcc/doc/tm.texi | 3 ++- gcc/target.def | 3 ++- gcc/toplev.c | 3 ++- 4 files changed, 22 insertions(+), 3 deletions(-) diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c index 989a9f15250..6909e200de1 100644 --- a/gcc/config/riscv/riscv.c +++ b/gcc/config/riscv/riscv.c @@ -5299,6 +5299,19 @@ riscv_gpr_save_operation_p (rtx op) return true; } +/* Implement TARGET_ASAN_SHADOW_OFFSET. */ + +static unsigned HOST_WIDE_INT +riscv_asan_shadow_offset (void) +{ + /* We only have libsanitizer support for RV64 at present. + + This number must match kRiscv*_ShadowOffset* in the file + libsanitizer/asan/asan_mapping.h which is currently 1<<29 for rv64, + even though 1<<36 makes more sense. */ + return TARGET_64BIT ? (HOST_WIDE_INT_1 << 29) : 0; +} + /* Initialize the GCC target structure. */ #undef TARGET_ASM_ALIGNED_HI_OP #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t" @@ -5482,6 +5495,9 @@ riscv_gpr_save_operation_p (rtx op) #undef TARGET_NEW_ADDRESS_PROFITABLE_P #define TARGET_NEW_ADDRESS_PROFITABLE_P riscv_new_address_profitable_p +#undef TARGET_ASAN_SHADOW_OFFSET +#define TARGET_ASAN_SHADOW_OFFSET riscv_asan_shadow_offset + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-riscv.h" diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index a783a21f6cf..f7f82911f05 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -12094,7 +12094,8 @@ is zero, which disables this optimization. @deftypefn {Target Hook} {unsigned HOST_WIDE_INT} TARGET_ASAN_SHADOW_OFFSET (void) Return the offset bitwise ored into shifted address to get corresponding Address Sanitizer shadow memory address. NULL if Address Sanitizer is not -supported by the target. +supported by the target. May return 0 if Address Sanitizer is not supported +by a subtarget. @end deftypefn @deftypefn {Target Hook} {unsigned HOST_WIDE_INT} TARGET_MEMMODEL_CHECK (unsigned HOST_WIDE_INT @var{val}) diff --git a/gcc/target.def b/gcc/target.def index 71411d85559..ff7ad5983ac 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -4462,7 +4462,8 @@ DEFHOOK (asan_shadow_offset, "Return the offset bitwise ored into shifted address to get corresponding\n\ Address Sanitizer shadow memory address. NULL if Address Sanitizer is not\n\ -supported by the target.", +supported by the target. May return 0 if Address Sanitizer is not supported\n\ +by a subtarget.", unsigned HOST_WIDE_INT, (void), NULL) diff --git a/gcc/toplev.c b/gcc/toplev.c index e32dc285c1c..e0e0e04e95f 100644 --- a/gcc/toplev.c +++ b/gcc/toplev.c @@ -1834,7 +1834,8 @@ process_options (void) } if ((flag_sanitize & SANITIZE_USER_ADDRESS) - && targetm.asan_shadow_offset == NULL) + && ((targetm.asan_shadow_offset == NULL) + || (targetm.asan_shadow_offset () == 0))) { warning_at (UNKNOWN_LOCATION, 0, "%<-fsanitize=address%> not supported for this target"); -- 2.30.2