From dcf4c64a66d5ed33fb10bcfcf65017bef39a4d0f Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Thu, 19 Aug 2021 17:30:42 +0000 Subject: [PATCH] test_caller_bcd: fix and refactor addg6s test loop --- src/openpower/decoder/isa/test_caller_bcd.py | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/openpower/decoder/isa/test_caller_bcd.py b/src/openpower/decoder/isa/test_caller_bcd.py index 5b740899..6ce0a065 100644 --- a/src/openpower/decoder/isa/test_caller_bcd.py +++ b/src/openpower/decoder/isa/test_caller_bcd.py @@ -345,14 +345,12 @@ class BCDTestCase(FHDLTestCase): rng10 = lambda: random.randrange(0, 10) bcdrng = lambda: int("".join((bcd[rng10()] for _ in range(16))), 2) - lst = [] + lst = [f"addg6s {gpr}, {gpr + 0}, {gpr + 1}" for gpr in range(31)] oregs = [0] * 32 - iregs = [bcdrng() for _ in range(32)] - for gpr in range(31): - lst += [f"addg6s {gpr}, {gpr + 0}, {gpr + 1}"] - oregs[gpr] = addg6s(iregs[gpr + 0], iregs[gpr + 1]) - for _ in range(16): + iregs = [bcdrng() for _ in range(32)] + for gpr in range(31): + oregs[gpr] = addg6s(iregs[gpr + 0], iregs[gpr + 1]) with self.subTest(): with Program(lst, bigendian=False) as program: sim = self.run_tst_program(program, iregs) -- 2.30.2