From dd05d8d756f590e17bac625be9938dae23292abe Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Fri, 27 Oct 2023 11:34:45 +0100 Subject: [PATCH] added english language description for lwasx instruction --- openpower/isa/fixedloadshift.mdwn | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn index 903019cd..8e61cdbd 100644 --- a/openpower/isa/fixedloadshift.mdwn +++ b/openpower/isa/fixedloadshift.mdwn @@ -230,7 +230,6 @@ Description: If RA=0 or RA=RT, the instruction form is invalid. - Special Registers Altered: None @@ -247,6 +246,14 @@ Pseudo-code: EA <- b + (RB) << (SH+1) RT <- EXTS(MEM(EA, 4)) +Description: + + Let the effective address (EA) be the sum of the contents of + register RB shifted by (SH+1), and (RA|0). + + The word in storage addressed by EA is loaded into RT[32:63]. + RT[0:31] are filled with a copy of bit 0 of the loaded word. + Special Registers Altered: None -- 2.30.2