From dd75498db79675a1a0b73c25e5f110969ee72d9d Mon Sep 17 00:00:00 2001 From: Peter Bergner Date: Thu, 16 Apr 2020 23:26:41 -0500 Subject: [PATCH] rs6000: Fix ICE in decompose_normal_address. [PR93974] Fix an ICE in decompose_normal_address(), which cannot handle Altivec AND: addresses, by disallowing them via implementing the target hook rs6000_cannot_substitute_mem_equiv_p. gcc/ PR rtl-optimization/93974 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define. (rs6000_cannot_substitute_mem_equiv_p): New function. gcc/testsuite/ PR rtl-optimization/93974 * g++.dg/pr93974.C: New test. --- gcc/ChangeLog | 6 ++++++ gcc/config/rs6000/rs6000.c | 20 ++++++++++++++++++++ gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/g++.dg/pr93974.C | 27 +++++++++++++++++++++++++++ 4 files changed, 58 insertions(+) create mode 100644 gcc/testsuite/g++.dg/pr93974.C diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5fd869a9239..53413e7b943 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2020-04-16 Peter Bergner + + PR rtl-optimization/93974 + * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define. + (rs6000_cannot_substitute_mem_equiv_p): New function. + 2020-04-16 Martin Jambor PR ipa/93621 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 4defc1ab52b..a2992e682c8 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1734,6 +1734,10 @@ static const struct attribute_spec rs6000_attribute_table[] = #undef TARGET_MANGLE_DECL_ASSEMBLER_NAME #define TARGET_MANGLE_DECL_ASSEMBLER_NAME rs6000_mangle_decl_assembler_name + +#undef TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P +#define TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P \ + rs6000_cannot_substitute_mem_equiv_p /* Processor table. */ @@ -26375,6 +26379,22 @@ rs6000_predict_doloop_p (struct loop *loop) return true; } +/* Implement TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P. */ + +static bool +rs6000_cannot_substitute_mem_equiv_p (rtx mem) +{ + gcc_assert (MEM_P (mem)); + + /* curr_insn_transform()'s handling of subregs cannot handle altivec AND: + type addresses, so don't allow MEMs with those address types to be + substituted as an equivalent expression. See PR93974 for details. */ + if (GET_CODE (XEXP (mem, 0)) == AND) + return true; + + return false; +} + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-rs6000.h" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d862567ce4f..e10dc694e41 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2020-04-16 Peter Bergner + + PR rtl-optimization/93974 + * g++.dg/pr93974.C: New test. + 2020-04-16 Iain Sandoe * g++.dg/cpp0x/lambda/pr94426-2.C: Adjust scan-asms to test diff --git a/gcc/testsuite/g++.dg/pr93974.C b/gcc/testsuite/g++.dg/pr93974.C new file mode 100644 index 00000000000..562de0a6017 --- /dev/null +++ b/gcc/testsuite/g++.dg/pr93974.C @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mdejagnu-cpu=power8 -O3 -fstack-protector-strong" } */ + +class a { + double b[2]; +public: + a(); +}; + +class c { +public: + typedef a d; + d m_fn1() { + a e; + return e; + } +}; +template void operator+(f, typename f::d); +void g() { + c connector; + for (;;) { + c cut; + a h = cut.m_fn1(); + connector + h; + } +} -- 2.30.2