From dd88095092fab7877b509132a1cc9ac9266176b7 Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 15 Apr 2022 03:29:29 +0100 Subject: [PATCH] --- HDL_workflow/ls2.mdwn | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/HDL_workflow/ls2.mdwn b/HDL_workflow/ls2.mdwn index ceb844bab..a2cae4af7 100644 --- a/HDL_workflow/ls2.mdwn +++ b/HDL_workflow/ls2.mdwn @@ -1,10 +1,9 @@ # Steps for Hello World Microwatt ls2 for fpga/boards * Currently works for Arty A7-100t, VERSA_ECP5 and in future others - * Bugzilla page -## Install Instructions +# Install Instructions git clone https://git.libre-soc.org/git/dev-env-setup.git cd dev-env-setup @@ -51,12 +50,13 @@ # plug in FPGA board (Arty A7-100t, VERSA_ECP5, other) # run in 2nd terminal "minicom -D /dev/ttyUSB1" - python3 src/ls2.py arty_a7 hello_world.bin + python3 src/ls2.py arty_a7 hello_world.bin # for Arty A7-100t + python3 src/ls2.py versa_ecp5 hello_world.bin # (for a VERSA_ECP5) + +This directly programs a tmp bitstream using xc3sprog to nexys4 board. +If needed modify sources to produce a fixed file bitstream and -* this directly programs a tmp bitstream using xc3sprog to nexys4 board -* If needed modify sources to produce a fixed file bitstream and -* cp top.bit to board/server -* xc3sprog -c nexys4 top.bit -* minicom -D /dev/ttyUSB1 + copy build/top.bit to board/server (scp, rsync) + minicom -D /dev/ttyUSB1 + xc3sprog -c nexys4 top.bit -* Or python3 src/ls2.py versa_ecp5 hello_world.bin (for a VERSA_ECP5) -- 2.30.2