From ddf4c748c9f6abb1b5b379d395eb07ef8af3e06a Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 22 Jun 2020 13:02:07 +0100 Subject: [PATCH] enable byte-reverse in CompLDSTUnit test --- src/soc/experiment/compldst_multi.py | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/soc/experiment/compldst_multi.py b/src/soc/experiment/compldst_multi.py index 93b4e068..4bcfc7dd 100644 --- a/src/soc/experiment/compldst_multi.py +++ b/src/soc/experiment/compldst_multi.py @@ -543,10 +543,12 @@ def wait_for(sig, wait=True, test1st=False): break -def store(dut, src1, src2, src3, imm, imm_ok=True, update=False): +def store(dut, src1, src2, src3, imm, imm_ok=True, update=False, + byterev=True): print ("ST", src1, src2, src3, imm, imm_ok, update) yield dut.oper_i.insn_type.eq(InternalOp.OP_STORE) yield dut.oper_i.data_len.eq(2) # half-word + yield dut.oper_i.byte_reverse.eq(byterev) yield dut.src1_i.eq(src1) yield dut.src2_i.eq(src2) yield dut.src3_i.eq(src3) @@ -597,10 +599,12 @@ def store(dut, src1, src2, src3, imm, imm_ok=True, update=False): return addr -def load(dut, src1, src2, imm, imm_ok=True, update=False, zero_a=False): +def load(dut, src1, src2, imm, imm_ok=True, update=False, zero_a=False, + byterev=True): print ("LD", src1, src2, imm, imm_ok, update) yield dut.oper_i.insn_type.eq(InternalOp.OP_LOAD) yield dut.oper_i.data_len.eq(2) # half-word + yield dut.oper_i.byte_reverse.eq(byterev) yield dut.src1_i.eq(src1) yield dut.src2_i.eq(src2) yield dut.oper_i.zero_a.eq(zero_a) -- 2.30.2