From ddff61d69b48b6962dc925d5835f86aef34da136 Mon Sep 17 00:00:00 2001 From: David Edelsohn Date: Thu, 4 Dec 2014 02:13:22 +0000 Subject: [PATCH] rs6000.md (floatsidf2_internal): Use std::swap. * config/rs6000/rs6000.md (floatsidf2_internal): Use std::swap. (floatunssidf2_internal): Same. * config/rs6000/rs6000.c (rs6000_emit_vector_compare): Same. (rs6000_emit_int_cmove): Same. (rs6000_sched_reorder): Same. (altivec_expand_vec_perm_const): Same. (rs6000_expand_vec_perm_const_1): Same. From-SVN: r218339 --- gcc/ChangeLog | 10 ++++++++++ gcc/config/rs6000/rs6000.c | 21 +++++---------------- gcc/config/rs6000/rs6000.md | 10 ++-------- 3 files changed, 17 insertions(+), 24 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0fac9a2b978..aeb6acb5e25 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2014-12-03 David Edelsohn + + * config/rs6000/rs6000.md (floatsidf2_internal): Use std::swap. + (floatunssidf2_internal): Same. + * config/rs6000/rs6000.c (rs6000_emit_vector_compare): Same. + (rs6000_emit_int_cmove): Same. + (rs6000_sched_reorder): Same. + (altivec_expand_vec_perm_const): Same. + (rs6000_expand_vec_perm_const_1): Same. + 2014-12-03 Ulrich Weigand PR rtl-optimization/64010 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 506233748a7..8c492cce7cf 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -19796,12 +19796,7 @@ rs6000_emit_vector_compare (enum rtx_code rcode, if (try_again) { if (swap_operands) - { - rtx tmp; - tmp = op0; - op0 = op1; - op1 = tmp; - } + std::swap (op0, op1); mask = rs6000_emit_vector_compare_inner (rcode, op0, op1); if (mask) @@ -20114,9 +20109,7 @@ rs6000_emit_int_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond) default: /* We need to swap the sense of the comparison. */ { - rtx t = true_cond; - true_cond = false_cond; - false_cond = t; + std::swap (false_cond, true_cond); PUT_CODE (condition_rtx, reverse_condition (cond_code)); } break; @@ -27496,11 +27489,7 @@ rs6000_sched_reorder (FILE *dump ATTRIBUTE_UNUSED, int sched_verbose, if (is_nonpipeline_insn (ready[n_ready - 1]) && (recog_memoized (ready[n_ready - 2]) > 0)) /* Simply swap first two insns. */ - { - rtx_insn *tmp = ready[n_ready - 1]; - ready[n_ready - 1] = ready[n_ready - 2]; - ready[n_ready - 2] = tmp; - } + std::swap (ready[n_ready - 1], ready[n_ready - 2]); } if (rs6000_cpu == PROCESSOR_POWER6) @@ -31305,7 +31294,7 @@ altivec_expand_vec_perm_const (rtx operands[4]) (or swapped back) to ensure proper right-to-left numbering from 0 to 2N-1. */ if (swapped ^ !BYTES_BIG_ENDIAN) - x = op0, op0 = op1, op1 = x; + std::swap (op0, op1); if (imode != V16QImode) { op0 = gen_lowpart (imode, op0); @@ -31361,7 +31350,7 @@ rs6000_expand_vec_perm_const_1 (rtx target, rtx op0, rtx op1, return false; perm0 -= 2; perm1 += 2; - x = op0, op0 = op1, op1 = x; + std::swap (op0, op1); } /* If the second selector does not come from the second operand, fail. */ else if ((perm1 & 2) == 0) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index f3b5aae18e6..fbf3c16e3e4 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5546,10 +5546,7 @@ highword = adjust_address (operands[4], SImode, 0); lowword = adjust_address (operands[4], SImode, 4); if (! WORDS_BIG_ENDIAN) - { - rtx tmp; - tmp = highword; highword = lowword; lowword = tmp; - } + std::swap (lowword, highword); emit_insn (gen_xorsi3 (operands[6], operands[1], GEN_INT (~ (HOST_WIDE_INT) 0x7fffffff))); @@ -5657,10 +5654,7 @@ highword = adjust_address (operands[4], SImode, 0); lowword = adjust_address (operands[4], SImode, 4); if (! WORDS_BIG_ENDIAN) - { - rtx tmp; - tmp = highword; highword = lowword; lowword = tmp; - } + std::swap (lowword, highword); emit_move_insn (lowword, operands[1]); emit_move_insn (highword, operands[2]); -- 2.30.2