From ded76e2fe0d749ce1ef2930e21d7c6d74dfa3696 Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 21 Oct 2021 16:50:01 +0100
Subject: [PATCH] confirmed (in prototype form that LHS Cat will cause conflict

---
 src/ieee754/part/test/minitest_partsig.py | 9 ++++++++-
 src/ieee754/part_cat/cat.py               | 1 +
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/ieee754/part/test/minitest_partsig.py b/src/ieee754/part/test/minitest_partsig.py
index e18e39f6..830afa5a 100644
--- a/src/ieee754/part/test/minitest_partsig.py
+++ b/src/ieee754/part/test/minitest_partsig.py
@@ -22,12 +22,19 @@ if __name__ == "__main__":
     a = SimdSignal(mask, 16)
     b = SimdSignal(mask, 16)
     o = SimdSignal(mask, 32)
+    a1 = SimdSignal(mask, 16)
+    b1 = SimdSignal(mask, 16)
+    omask = (1<<len(o)) - 1
     a.set_module(m)
     b.set_module(m)
     o.set_module(m)
+    a1.set_module(m)
+    b1.set_module(m)
 
-    omask = (1<<len(o)) - 1
+    # RHS Cat
     m.d.comb += o.eq(Cat(a, b))
+    # LHS Cat
+    m.d.comb += Cat(a1, b1).eq(o)
 
     sim = create_simulator(m, [], "minitest")
 
diff --git a/src/ieee754/part_cat/cat.py b/src/ieee754/part_cat/cat.py
index f663afdd..291575f4 100644
--- a/src/ieee754/part_cat/cat.py
+++ b/src/ieee754/part_cat/cat.py
@@ -71,6 +71,7 @@ class PartitionedCat(Elaboratable):
         self.width = width
         mask = ctx.get_mask()
         self.output = SimdSignal(mask, self.width, reset_less=True)
+        self.output.set_module(ctx.psig.m)
         self.partition_points = self.output.partpoints
         self.mwidth = len(self.partition_points)+1
 
-- 
2.30.2