From dedb4073749bda0f85dfbcc43d45a5d1a66260ad Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Fri, 2 Oct 2020 18:04:39 -0700 Subject: [PATCH] add regression testcase --- src/soc/fu/div/test/test_pipe_caller.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/soc/fu/div/test/test_pipe_caller.py b/src/soc/fu/div/test/test_pipe_caller.py index 9c4ba3fe..188196e7 100644 --- a/src/soc/fu/div/test/test_pipe_caller.py +++ b/src/soc/fu/div/test/test_pipe_caller.py @@ -23,6 +23,12 @@ class DivTestCases(TestAccumulatorBase): with Program(lst, bigendian) as prog: self.add_case(prog, initial_regs) + def case_divwe__regression(self): + lst = ["divwe. 3, 1, 2"] + initial_regs = [0] * 32 + with Program(lst, bigendian) as prog: + self.add_case(prog, initial_regs) + def case_divw_regression(self): # simulator is wrong, FSM and power-instruction-analyzer both correct lst = [f"divw 0, 1, 2"] -- 2.30.2