From df02f41e1056b2915172b93123ca72d49602c1e7 Mon Sep 17 00:00:00 2001
From: bugzilla-daemon <bugzilla-daemon@libre-soc.org>
Date: Mon, 25 May 2020 04:03:04 +0000
Subject: [PATCH] [libre-riscv-dev] [Bug 350] LDSTCompUnit also needs to
 support zeroing on RA

---
 00/de638044f6fa307d68fda5230c140452f3d2b5 | 65 +++++++++++++++++++++++
 1 file changed, 65 insertions(+)
 create mode 100644 00/de638044f6fa307d68fda5230c140452f3d2b5

diff --git a/00/de638044f6fa307d68fda5230c140452f3d2b5 b/00/de638044f6fa307d68fda5230c140452f3d2b5
new file mode 100644
index 0000000..910089d
--- /dev/null
+++ b/00/de638044f6fa307d68fda5230c140452f3d2b5
@@ -0,0 +1,65 @@
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+Date: Mon, 25 May 2020 04:03:04 +0000
+X-Bugzilla-Reason: CC
+X-Bugzilla-Type: changed
+X-Bugzilla-Watch-Reason: None
+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
+X-Bugzilla-Version: unspecified
+X-Bugzilla-Keywords: 
+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
+X-Bugzilla-Status: CONFIRMED
+X-Bugzilla-Resolution: 
+X-Bugzilla-Priority: ---
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+Message-ID: <bug-350-13-5ni7B83v2J@https.bugs.libre-soc.org/>
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+Auto-Submitted: auto-generated
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+Subject: [libre-riscv-dev] [Bug 350] LDSTCompUnit also needs to support
+ zeroing on RA
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-- 
2.30.2