From df53fe12e7ed667d36d3829681cfc43a3355b834 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 21 Aug 2019 12:54:11 -0700 Subject: [PATCH] Fix spacing --- passes/pmgen/xilinx_srl.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/passes/pmgen/xilinx_srl.cc b/passes/pmgen/xilinx_srl.cc index 2d052534d..bfda55af0 100644 --- a/passes/pmgen/xilinx_srl.cc +++ b/passes/pmgen/xilinx_srl.cc @@ -93,7 +93,7 @@ struct XilinxSrlPass : public Pass { { log_header(design, "Executing XILINX_SRL pass (Xilinx shift register extraction).\n"); - int minlen = 3; + int minlen = 3; size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) @@ -106,7 +106,7 @@ struct XilinxSrlPass : public Pass { } extra_args(args, argidx, design); - auto f = std::bind(reduce_chain, std::placeholders::_1, minlen); + auto f = std::bind(reduce_chain, std::placeholders::_1, minlen); for (auto module : design->selected_modules()) while (xilinx_srl_pm(module, module->selected_cells()).run_reduce(f)) {} } -- 2.30.2