From df76da8fd710394e7ea999e90994483da223f545 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 17 Jun 2014 21:49:59 +0200 Subject: [PATCH] Added test case for AstNode::MEM2REG_FL_CMPLX_LHS --- tests/simple/mem2reg.v | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/tests/simple/mem2reg.v b/tests/simple/mem2reg.v index e2c136ddb..3630b57c7 100644 --- a/tests/simple/mem2reg.v +++ b/tests/simple/mem2reg.v @@ -43,3 +43,15 @@ end endmodule +// ------------------------------------------------------ + +// http://www.reddit.com/r/yosys/comments/28d9lx/problem_with_concatenation_of_two_dimensional/ +module test3( input clk, input [8:0] din_a, output reg [7:0] dout_a, output [7:0] dout_b); +reg [7:0] dint_c [0:7]; +always @(posedge clk) + begin + {dout_a[0], dint_c[3]} <= din_a; + end +assign dout_b = dint_c[3]; +endmodule + -- 2.30.2