From dfa62d97a0fdfd320f8d08e44883342c186acaae Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 8 Apr 2020 09:24:36 +0200 Subject: [PATCH] aco: implement 8-bit/16-bit nir_intrinsic_{shuffle,_read_invocation} Signed-off-by: Samuel Pitoiset Reviewed-by: Rhys Perry Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 47376511ed5..98f10074645 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -7539,7 +7539,14 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr) if (instr->intrinsic == nir_intrinsic_read_invocation || !nir_src_is_divergent(instr->src[1])) tid = bld.as_uniform(tid); Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); - if (src.regClass() == v1) { + if (src.regClass() == v1b || src.regClass() == v2b) { + Temp tmp = bld.tmp(v1); + tmp = emit_wqm(ctx, emit_bpermute(ctx, bld, tid, src), tmp); + if (dst.type() == RegType::vgpr) + bld.pseudo(aco_opcode::p_split_vector, Definition(dst), bld.def(src.regClass() == v1b ? v3b : v2b), tmp); + else + bld.pseudo(aco_opcode::p_as_uniform, Definition(dst), tmp); + } else if (src.regClass() == v1) { emit_wqm(ctx, emit_bpermute(ctx, bld, tid, src), dst); } else if (src.regClass() == v2) { Temp lo = bld.tmp(v1), hi = bld.tmp(v1); -- 2.30.2