From dfc6becad556e565dd1f65e2d572c4ed0f737e6d Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Wed, 1 Sep 2021 12:25:37 +0100
Subject: [PATCH]

---
 openpower/sv/svp64.mdwn | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 86f2b7b88..549e98ddb 100644
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -269,6 +269,9 @@ Note:
 [`bf16`](https://en.wikipedia.org/wiki/Bfloat16_floating-point_format)
 is reserved for a future implementation of SV
 
+Note that any operation in Power ISA ending in "s" (`fadds`) shall
+perform its operation at **half** the ELWIDTH.  `sv.fadds/ew=f32` shall perform an IEEE754 FP16 operation that is then "padded" to fill out to an IEEE754 FP32.
+
 ## Elwidth for CRs:
 
 TODO, important, particularly for crops, mfcr and mtcr, what elwidth
-- 
2.30.2