From dff95cc7a63af873ca281839dcd21785989ff40e Mon Sep 17 00:00:00 2001 From: Mark Kettenis Date: Sun, 12 May 2002 21:16:08 +0000 Subject: [PATCH] * i387-tdep.c (i387_supply_fxsave): Skip the SSE registers if the're not supported by the current architecture. (i387_fill_fxsave): Likewise. --- gdb/ChangeLog | 6 ++++++ gdb/i387-tdep.c | 18 ++++++++++++------ 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 6c27c1148c3..6ec785baa3e 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,9 @@ +2002-05-12 Mark Kettenis + + * i387-tdep.c (i387_supply_fxsave): Skip the SSE registers if + the're not supported by the current architecture. + (i387_fill_fxsave): Likewise. + 2002-05-12 Fred Fish * symfile.c (default_symfile_offsets): Arrange for uninitialized diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c index 000264f8a75..59b60d77a9d 100644 --- a/gdb/i387-tdep.c +++ b/gdb/i387-tdep.c @@ -1,6 +1,6 @@ /* Intel 387 floating point stuff. - Copyright 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000, 2001 - Free Software Foundation, Inc. + Copyright 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000, + 2001, 2002 Free Software Foundation, Inc. This file is part of GDB. @@ -542,9 +542,12 @@ static int i387_tag (unsigned char *raw); void i387_supply_fxsave (char *fxsave) { - int i; + int i, last_regnum = MXCSR_REGNUM; + + if (gdbarch_tdep (current_gdbarch)->num_xmm_regs == 0) + last_regnum = FOP_REGNUM; - for (i = FP0_REGNUM; i <= MXCSR_REGNUM; i++) + for (i = FP0_REGNUM; i <= last_regnum; i++) { /* Most of the FPU control registers occupy only 16 bits in the fxsave area. Give those a special treatment. */ @@ -601,9 +604,12 @@ i387_supply_fxsave (char *fxsave) void i387_fill_fxsave (char *fxsave, int regnum) { - int i; + int i, last_regnum = MXCSR_REGNUM; + + if (gdbarch_tdep (current_gdbarch)->num_xmm_regs == 0) + last_regnum = FOP_REGNUM; - for (i = FP0_REGNUM; i <= MXCSR_REGNUM; i++) + for (i = FP0_REGNUM; i <= last_regnum; i++) if (regnum == -1 || regnum == i) { /* Most of the FPU control registers occupy only 16 bits in -- 2.30.2