From e07b7f632cef380c7d824dd2951dcf7166a61ee3 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 17 Mar 2015 14:59:36 +0100 Subject: [PATCH] mibuild/lattice: use ODDRXD1 and new synthesis directive --- mibuild/lattice/common.py | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/mibuild/lattice/common.py b/mibuild/lattice/common.py index 1f5654c4..0cf8a07f 100644 --- a/mibuild/lattice/common.py +++ b/mibuild/lattice/common.py @@ -1,6 +1,8 @@ from migen.fhdl.std import * from migen.genlib.io import * +from migen.genlib.resetsync import AsyncResetSynchronizer + class LatticeAsyncResetSynchronizerImpl(Module): def __init__(self, cd, async_reset): rst1 = Signal() @@ -18,8 +20,9 @@ class LatticeAsyncResetSynchronizer: class LatticeDDROutputImpl(Module): def __init__(self, i1, i2, o, clk): - self.specials += Instance("ODDRA", - i_CLK=clk, i_RST=0, + self.specials += Instance("ODDRXD1", + synthesis_directive="ODDRAPPS=\"SCLK_ALIGNED\"", + i_SCLK=clk, i_DA=i1, i_DB=i2, o_Q=o, ) -- 2.30.2