From e1403fc2af61c224c573c47c77a36f9b1b78e7df Mon Sep 17 00:00:00 2001 From: Mitch Hayenga Date: Sat, 20 Sep 2014 17:18:35 -0400 Subject: [PATCH] alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate activate(), suspend(), and halt() used on thread contexts had an optional delay parameter. However this parameter was often ignored. Also, when used, the delay was seemily arbitrarily set to 0 or 1 cycle (no other delays were ever specified). This patch removes the delay parameter and 'Events' associated with them across all ISAs and cores. Unused activate logic is also removed. --- src/arch/alpha/utility.hh | 2 +- src/arch/arm/utility.hh | 2 +- src/arch/mips/mt.hh | 2 +- src/arch/mips/utility.cc | 2 +- src/arch/power/utility.hh | 2 +- src/arch/sparc/utility.hh | 2 +- src/arch/x86/utility.cc | 4 +- src/cpu/base.hh | 8 +- src/cpu/checker/thread_context.hh | 10 +- src/cpu/inorder/cpu.cc | 12 +- src/cpu/inorder/cpu.hh | 6 +- src/cpu/inorder/thread_context.cc | 8 +- src/cpu/inorder/thread_context.hh | 13 +- src/cpu/kvm/base.cc | 6 +- src/cpu/kvm/base.hh | 2 +- src/cpu/minor/cpu.cc | 30 ++--- src/cpu/minor/cpu.hh | 19 +-- src/cpu/o3/cpu.cc | 214 ++---------------------------- src/cpu/o3/cpu.hh | 124 +---------------- src/cpu/o3/fetch_impl.hh | 8 +- src/cpu/o3/thread_context.hh | 9 +- src/cpu/o3/thread_context_impl.hh | 11 +- src/cpu/simple/atomic.cc | 6 +- src/cpu/simple/atomic.hh | 2 +- src/cpu/simple/timing.cc | 6 +- src/cpu/simple/timing.hh | 2 +- src/cpu/simple_thread.cc | 12 +- src/cpu/simple_thread.hh | 5 +- src/cpu/thread_context.hh | 19 ++- src/sim/process.cc | 2 +- 30 files changed, 96 insertions(+), 454 deletions(-) diff --git a/src/arch/alpha/utility.hh b/src/arch/alpha/utility.hh index 1cd19cc95..72643cb16 100644 --- a/src/arch/alpha/utility.hh +++ b/src/arch/alpha/utility.hh @@ -68,7 +68,7 @@ void zeroRegisters(TC *tc); // Alpha IPR register accessors inline bool PcPAL(Addr addr) { return addr & 0x3; } inline void startupCPU(ThreadContext *tc, int cpuId) -{ tc->activate(Cycles(0)); } +{ tc->activate(); } //////////////////////////////////////////////////////////////////////// // diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh index 1eea743bb..2318f1aa9 100644 --- a/src/arch/arm/utility.hh +++ b/src/arch/arm/utility.hh @@ -104,7 +104,7 @@ void zeroRegisters(TC *tc); inline void startupCPU(ThreadContext *tc, int cpuId) { - tc->activate(Cycles(0)); + tc->activate(); } void copyRegs(ThreadContext *src, ThreadContext *dest); diff --git a/src/arch/mips/mt.hh b/src/arch/mips/mt.hh index 64c765f19..b440eefa6 100755 --- a/src/arch/mips/mt.hh +++ b/src/arch/mips/mt.hh @@ -96,7 +96,7 @@ restoreThread(TC *tc) // TODO: SET PC WITH AN EVENT INSTEAD OF INSTANTANEOUSLY tc->pcState(restartPC); - tc->activate(Cycles(0)); + tc->activate(); warn("%i: Restoring thread %i in %s @ PC %x", curTick(), tc->threadId(), tc->getCpuPtr()->name(), restartPC); diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc index ff410bad1..80047fbfd 100644 --- a/src/arch/mips/utility.cc +++ b/src/arch/mips/utility.cc @@ -231,7 +231,7 @@ zeroRegisters(CPU *cpu) void startupCPU(ThreadContext *tc, int cpuId) { - tc->activate(Cycles(0)); + tc->activate(); } void diff --git a/src/arch/power/utility.hh b/src/arch/power/utility.hh index 8d9f97436..907e451b9 100644 --- a/src/arch/power/utility.hh +++ b/src/arch/power/utility.hh @@ -59,7 +59,7 @@ void zeroRegisters(TC *tc); inline void startupCPU(ThreadContext *tc, int cpuId) { - tc->activate(Cycles(0)); + tc->activate(); } void diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh index 285a40c26..bc67f5ef8 100644 --- a/src/arch/sparc/utility.hh +++ b/src/arch/sparc/utility.hh @@ -77,7 +77,7 @@ startupCPU(ThreadContext *tc, int cpuId) { // Other CPUs will get activated by IPIs if (cpuId == 0 || !FullSystem) - tc->activate(Cycles(0)); + tc->activate(); } void copyRegs(ThreadContext *src, ThreadContext *dest); diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc index fcd52d38a..d58498be2 100644 --- a/src/arch/x86/utility.cc +++ b/src/arch/x86/utility.cc @@ -203,12 +203,12 @@ void initCPU(ThreadContext *tc, int cpuId) void startupCPU(ThreadContext *tc, int cpuId) { if (cpuId == 0 || !FullSystem) { - tc->activate(Cycles(0)); + tc->activate(); } else { // This is an application processor (AP). It should be initialized to // look like only the BIOS POST has run on it and put then put it into // a halted state. - tc->suspend(Cycles(0)); + tc->suspend(); } } diff --git a/src/cpu/base.hh b/src/cpu/base.hh index cc3f861cc..ac3d1d892 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -251,10 +251,8 @@ class BaseCPU : public MemObject /// Provide access to the tracer pointer Trace::InstTracer * getTracer() { return tracer; } - /// Notify the CPU that the indicated context is now active. The - /// delay parameter indicates the number of ticks to wait before - /// executing (typically 0 or 1). - virtual void activateContext(ThreadID thread_num, Cycles delay) {} + /// Notify the CPU that the indicated context is now active. + virtual void activateContext(ThreadID thread_num) {} /// Notify the CPU that the indicated context is now suspended. virtual void suspendContext(ThreadID thread_num) {} @@ -285,8 +283,6 @@ class BaseCPU : public MemObject virtual void startup(); virtual void regStats(); - virtual void activateWhenReady(ThreadID tid) {}; - void registerThreadContexts(); /** diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh index f868f4cbb..590cef004 100644 --- a/src/cpu/checker/thread_context.hh +++ b/src/cpu/checker/thread_context.hh @@ -157,16 +157,14 @@ class CheckerThreadContext : public ThreadContext checkerTC->setStatus(new_status); } - /// Set the status to Active. Optional delay indicates number of - /// cycles to wait before beginning execution. - void activate(Cycles delay = Cycles(1)) - { actualTC->activate(delay); } + /// Set the status to Active. + void activate() { actualTC->activate(); } /// Set the status to Suspended. - void suspend(Cycles delay) { actualTC->suspend(delay); } + void suspend() { actualTC->suspend(); } /// Set the status to Halted. - void halt(Cycles delay) { actualTC->halt(delay); } + void halt() { actualTC->halt(); } void dumpFuncProfile() { actualTC->dumpFuncProfile(); } diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc index c825f2979..86a44ab38 100644 --- a/src/cpu/inorder/cpu.cc +++ b/src/cpu/inorder/cpu.cc @@ -1090,11 +1090,11 @@ InOrderCPU::activateThreadInPipeline(ThreadID tid) } void -InOrderCPU::deactivateContext(ThreadID tid, Cycles delay) +InOrderCPU::deactivateContext(ThreadID tid) { DPRINTF(InOrderCPU,"[tid:%i]: Deactivating ...\n", tid); - scheduleCpuEvent(DeactivateThread, NoFault, tid, dummyInst[tid], delay); + scheduleCpuEvent(DeactivateThread, NoFault, tid, dummyInst[tid]); // Be sure to signal that there's some activity so the CPU doesn't // deschedule itself. @@ -1172,12 +1172,12 @@ InOrderCPU::tickThreadStats() } void -InOrderCPU::activateContext(ThreadID tid, Cycles delay) +InOrderCPU::activateContext(ThreadID tid) { DPRINTF(InOrderCPU,"[tid:%i]: Activating ...\n", tid); - scheduleCpuEvent(ActivateThread, NoFault, tid, dummyInst[tid], delay); + scheduleCpuEvent(ActivateThread, NoFault, tid, dummyInst[tid]); // Be sure to signal that there's some activity so the CPU doesn't // deschedule itself. @@ -1187,12 +1187,12 @@ InOrderCPU::activateContext(ThreadID tid, Cycles delay) } void -InOrderCPU::activateNextReadyContext(Cycles delay) +InOrderCPU::activateNextReadyContext() { DPRINTF(InOrderCPU,"Activating next ready thread\n"); scheduleCpuEvent(ActivateNextReadyThread, NoFault, 0/*tid*/, dummyInst[0], - delay, ActivateNextReadyThread_Pri); + Cycles(0), ActivateNextReadyThread_Pri); // Be sure to signal that there's some activity so the CPU doesn't // deschedule itself. diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh index 7efd5ae21..b82aba779 100644 --- a/src/cpu/inorder/cpu.hh +++ b/src/cpu/inorder/cpu.hh @@ -498,7 +498,7 @@ class InOrderCPU : public BaseCPU void trap(const Fault &fault, ThreadID tid, DynInstPtr inst); /** Schedule thread activation on the CPU */ - void activateContext(ThreadID tid, Cycles delay = Cycles(0)); + void activateContext(ThreadID tid); /** Add Thread to Active Threads List. */ void activateThread(ThreadID tid); @@ -507,13 +507,13 @@ class InOrderCPU : public BaseCPU void activateThreadInPipeline(ThreadID tid); /** Schedule Thread Activation from Ready List */ - void activateNextReadyContext(Cycles delay = Cycles(0)); + void activateNextReadyContext(); /** Add Thread From Ready List to Active Threads List. */ void activateNextReadyThread(); /** Schedule a thread deactivation on the CPU */ - void deactivateContext(ThreadID tid, Cycles delay = Cycles(0)); + void deactivateContext(ThreadID tid); /** Remove from Active Thread List */ void deactivateThread(ThreadID tid); diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc index 763cc6df2..1fc66d827 100644 --- a/src/cpu/inorder/thread_context.cc +++ b/src/cpu/inorder/thread_context.cc @@ -103,7 +103,7 @@ InOrderThreadContext::takeOverFrom(ThreadContext *old_context) } void -InOrderThreadContext::activate(Cycles delay) +InOrderThreadContext::activate() { DPRINTF(InOrderCPU, "Calling activate on Thread Context %d\n", getThreadNum()); @@ -113,12 +113,12 @@ InOrderThreadContext::activate(Cycles delay) thread->setStatus(ThreadContext::Active); - cpu->activateContext(thread->threadId(), delay); + cpu->activateContext(thread->threadId()); } void -InOrderThreadContext::suspend(Cycles delay) +InOrderThreadContext::suspend() { DPRINTF(InOrderCPU, "Calling suspend on Thread Context %d\n", getThreadNum()); @@ -131,7 +131,7 @@ InOrderThreadContext::suspend(Cycles delay) } void -InOrderThreadContext::halt(Cycles delay) +InOrderThreadContext::halt() { DPRINTF(InOrderCPU, "Calling halt on Thread Context %d\n", getThreadNum()); diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh index 2e525eb2a..e29b8f273 100644 --- a/src/cpu/inorder/thread_context.hh +++ b/src/cpu/inorder/thread_context.hh @@ -179,15 +179,14 @@ class InOrderThreadContext : public ThreadContext void setStatus(Status new_status) { thread->setStatus(new_status); } - /** Set the status to Active. Optional delay indicates number of - * cycles to wait before beginning execution. */ - void activate(Cycles delay = Cycles(1)); + /** Set the status to Active. */ + void activate(); /** Set the status to Suspended. */ - void suspend(Cycles delay = Cycles(0)); + void suspend(); /** Set the status to Halted. */ - void halt(Cycles delay = Cycles(0)); + void halt(); /** Takes over execution of a thread from another CPU. */ void takeOverFrom(ThreadContext *old_context); @@ -279,8 +278,8 @@ class InOrderThreadContext : public ThreadContext int flattenMiscIndex(int reg) { return cpu->isa[thread->threadId()]->flattenMiscIndex(reg); } - void activateContext(Cycles delay) - { cpu->activateContext(thread->threadId(), delay); } + void activateContext() + { cpu->activateContext(thread->threadId()); } void deallocateContext() { cpu->deallocateContext(thread->threadId()); } diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc index 2082670dc..ef9e8bb31 100644 --- a/src/cpu/kvm/base.cc +++ b/src/cpu/kvm/base.cc @@ -430,9 +430,9 @@ BaseKvmCPU::wakeup() } void -BaseKvmCPU::activateContext(ThreadID thread_num, Cycles delay) +BaseKvmCPU::activateContext(ThreadID thread_num) { - DPRINTF(Kvm, "ActivateContext %d (%d cycles)\n", thread_num, delay); + DPRINTF(Kvm, "ActivateContext %d\n", thread_num); assert(thread_num == 0); assert(thread); @@ -442,7 +442,7 @@ BaseKvmCPU::activateContext(ThreadID thread_num, Cycles delay) numCycles += ticksToCycles(thread->lastActivate - thread->lastSuspend); - schedule(tickEvent, clockEdge(delay)); + schedule(tickEvent, clockEdge(Cycles(0))); _status = Running; } diff --git a/src/cpu/kvm/base.hh b/src/cpu/kvm/base.hh index b987f6a3e..249398293 100644 --- a/src/cpu/kvm/base.hh +++ b/src/cpu/kvm/base.hh @@ -100,7 +100,7 @@ class BaseKvmCPU : public BaseCPU MasterPort &getInstPort() { return instPort; } void wakeup(); - void activateContext(ThreadID thread_num, Cycles delay); + void activateContext(ThreadID thread_num); void suspendContext(ThreadID thread_num); void deallocateContext(ThreadID thread_num); void haltContext(ThreadID thread_num); diff --git a/src/cpu/minor/cpu.cc b/src/cpu/minor/cpu.cc index f7007f6ff..45817c3a8 100644 --- a/src/cpu/minor/cpu.cc +++ b/src/cpu/minor/cpu.cc @@ -63,7 +63,6 @@ MinorCPU::MinorCPU(MinorCPUParams *params) : } threads.push_back(thread); - threadActivateEvents.push_back(new ThreadActivateEvent(*this, 0)); thread->setStatus(ThreadContext::Halted); @@ -87,7 +86,6 @@ MinorCPU::~MinorCPU() for (ThreadID thread_id = 0; thread_id < threads.size(); thread_id++) { delete threads[thread_id]; - delete threadActivateEvents[thread_id]; } } @@ -192,6 +190,9 @@ MinorCPU::startup() for (auto i = threads.begin(); i != threads.end(); i ++) (*i)->startup(); + + /* CPU state setup, activate initial context */ + activateContext(0); } unsigned int @@ -275,31 +276,20 @@ MinorCPU::takeOverFrom(BaseCPU *old_cpu) } void -MinorCPU::activateContext(ThreadID thread_id, Cycles delay) -{ - DPRINTF(MinorCPU, "ActivateContext thread: %d delay: %d\n", - thread_id, delay); - - if (!threadActivateEvents[thread_id]->scheduled()) { - schedule(threadActivateEvents[thread_id], clockEdge(delay)); - } -} - -void -MinorCPU::ThreadActivateEvent::process() +MinorCPU::activateContext(ThreadID thread_id) { - DPRINTFS(MinorCPU, (&cpu), "Activating thread: %d\n", thread_id); + DPRINTF(MinorCPU, "ActivateContext thread: %d", thread_id); /* Do some cycle accounting. lastStopped is reset to stop the * wakeup call on the pipeline from adding the quiesce period * to BaseCPU::numCycles */ - cpu.stats.quiesceCycles += cpu.pipeline->cyclesSinceLastStopped(); - cpu.pipeline->resetLastStopped(); + stats.quiesceCycles += pipeline->cyclesSinceLastStopped(); + pipeline->resetLastStopped(); /* Wake up the thread, wakeup the pipeline tick */ - cpu.threads[thread_id]->activate(); - cpu.wakeupOnEvent(Minor::Pipeline::CPUStageId); - cpu.pipeline->wakeupFetch(); + threads[thread_id]->activate(); + wakeupOnEvent(Minor::Pipeline::CPUStageId); + pipeline->wakeupFetch(); } void diff --git a/src/cpu/minor/cpu.hh b/src/cpu/minor/cpu.hh index 80f41b5d2..507261fbd 100644 --- a/src/cpu/minor/cpu.hh +++ b/src/cpu/minor/cpu.hh @@ -78,23 +78,6 @@ typedef SimpleThread MinorThread; class MinorCPU : public BaseCPU { protected: - /** Event for delayed wakeup of a thread */ - class ThreadActivateEvent : public Event - { - public: - MinorCPU &cpu; - ThreadID thread_id; - - ThreadActivateEvent(MinorCPU &cpu_, ThreadID thread_id_) : - cpu(cpu_), thread_id(thread_id_) - { } - - void process(); - }; - - /** Events to wakeup each thread */ - std::vector threadActivateEvents; - /** pipeline is a container for the clockable pipeline stage objects. * Elements of pipeline call TheISA to implement the model. */ Minor::Pipeline *pipeline; @@ -184,7 +167,7 @@ class MinorCPU : public BaseCPU void takeOverFrom(BaseCPU *old_cpu); /** Thread activation interface from BaseCPU. */ - void activateContext(ThreadID thread_id, Cycles delay); + void activateContext(ThreadID thread_id); void suspendContext(ThreadID thread_id); /** Interface for stages to signal that they have become active after diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index fdbbd5c14..2ae185532 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -147,67 +147,6 @@ FullO3CPU::TickEvent::description() const return "FullO3CPU tick"; } -template -FullO3CPU::ActivateThreadEvent::ActivateThreadEvent() - : Event(CPU_Switch_Pri) -{ -} - -template -void -FullO3CPU::ActivateThreadEvent::init(int thread_num, - FullO3CPU *thread_cpu) -{ - tid = thread_num; - cpu = thread_cpu; -} - -template -void -FullO3CPU::ActivateThreadEvent::process() -{ - cpu->activateThread(tid); -} - -template -const char * -FullO3CPU::ActivateThreadEvent::description() const -{ - return "FullO3CPU \"Activate Thread\""; -} - -template -FullO3CPU::DeallocateContextEvent::DeallocateContextEvent() - : Event(CPU_Tick_Pri), tid(0), remove(false), cpu(NULL) -{ -} - -template -void -FullO3CPU::DeallocateContextEvent::init(int thread_num, - FullO3CPU *thread_cpu) -{ - tid = thread_num; - cpu = thread_cpu; - remove = false; -} - -template -void -FullO3CPU::DeallocateContextEvent::process() -{ - cpu->deactivateThread(tid); - if (remove) - cpu->removeThread(tid); -} - -template -const char * -FullO3CPU::DeallocateContextEvent::description() const -{ - return "FullO3CPU \"Deallocate Context\""; -} - template FullO3CPU::FullO3CPU(DerivO3CPUParams *params) : BaseO3CPU(params), @@ -346,9 +285,6 @@ FullO3CPU::FullO3CPU(DerivO3CPUParams *params) renameMap[tid].init(®File, TheISA::ZeroReg, fpZeroReg, &freeList); - - activateThreadEvent[tid].init(tid, this); - deallocateContextEvent[tid].init(tid, this); } // Initialize rename map to assign physical registers to the @@ -389,7 +325,6 @@ FullO3CPU::FullO3CPU(DerivO3CPUParams *params) globalSeqNum[tid] = 1; #endif - contextSwitch = false; DPRINTF(O3CPU, "Creating O3CPU object.\n"); // Setup any thread state. @@ -613,9 +548,6 @@ FullO3CPU::tick() commit.tick(); - if (!FullSystem) - doContextSwitch(); - // Now advance the time buffers timeBuffer.advance(); @@ -761,18 +693,12 @@ FullO3CPU::totalOps() const template void -FullO3CPU::activateContext(ThreadID tid, Cycles delay) +FullO3CPU::activateContext(ThreadID tid) { assert(!switchedOut()); // Needs to set each stage to running as well. - if (delay){ - DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate " - "on cycle %d\n", tid, clockEdge(delay)); - scheduleActivateThreadEvent(tid, delay); - } else { - activateThread(tid); - } + activateThread(tid); // We don't want to wake the CPU if it is drained. In that case, // we just want to flag the thread as active and schedule the tick @@ -783,7 +709,7 @@ FullO3CPU::activateContext(ThreadID tid, Cycles delay) // If we are time 0 or if the last activation time is in the past, // schedule the next tick and wake up the fetch unit if (lastActivatedCycle == 0 || lastActivatedCycle < curTick()) { - scheduleTickEvent(delay); + scheduleTickEvent(Cycles(0)); // Be sure to signal that there's some activity so the CPU doesn't // deschedule itself. @@ -803,22 +729,12 @@ FullO3CPU::activateContext(ThreadID tid, Cycles delay) } template -bool -FullO3CPU::scheduleDeallocateContext(ThreadID tid, bool remove, - Cycles delay) -{ - // Schedule removal of thread data from CPU - if (delay){ - DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to deallocate " - "on tick %d\n", tid, clockEdge(delay)); - scheduleDeallocateContextEvent(tid, remove, delay); - return false; - } else { - deactivateThread(tid); - if (remove) - removeThread(tid); - return true; - } +void +FullO3CPU::deallocateContext(ThreadID tid, bool remove) +{ + deactivateThread(tid); + if (remove) + removeThread(tid); } template @@ -827,10 +743,10 @@ FullO3CPU::suspendContext(ThreadID tid) { DPRINTF(O3CPU,"[tid: %i]: Suspending Thread Context.\n", tid); assert(!switchedOut()); - bool deallocated = scheduleDeallocateContext(tid, false, Cycles(1)); + deallocateContext(tid, false); + // If this was the last thread then unschedule the tick event. - if ((activeThreads.size() == 1 && !deallocated) || - activeThreads.size() == 0) + if (activeThreads.size() == 0) unscheduleTickEvent(); DPRINTF(Quiesce, "Suspending Context\n"); @@ -845,7 +761,7 @@ FullO3CPU::haltContext(ThreadID tid) //For now, this is the same as deallocate DPRINTF(O3CPU,"[tid:%i]: Halt Context called. Deallocating", tid); assert(!switchedOut()); - scheduleDeallocateContext(tid, true, Cycles(1)); + deallocateContext(tid, true); } template @@ -896,7 +812,7 @@ FullO3CPU::insertThread(ThreadID tid) src_tc->setStatus(ThreadContext::Active); - activateContext(tid, Cycles(1)); + activateContext(tid); //Reset ROB/IQ/LSQ Entries commit.rob->resetEntries(); @@ -973,77 +889,6 @@ FullO3CPU::removeThread(ThreadID tid) */ } - -template -void -FullO3CPU::activateWhenReady(ThreadID tid) -{ - DPRINTF(O3CPU,"[tid:%i]: Checking if resources are available for incoming" - "(e.g. PhysRegs/ROB/IQ/LSQ) \n", - tid); - - bool ready = true; - - // Should these all be '<' not '>='? This seems backwards... - if (freeList.numFreeIntRegs() >= TheISA::NumIntRegs) { - DPRINTF(O3CPU,"[tid:%i] Suspending thread due to not enough " - "Phys. Int. Regs.\n", - tid); - ready = false; - } else if (freeList.numFreeFloatRegs() >= TheISA::NumFloatRegs) { - DPRINTF(O3CPU,"[tid:%i] Suspending thread due to not enough " - "Phys. Float. Regs.\n", - tid); - ready = false; - } else if (freeList.numFreeCCRegs() >= TheISA::NumCCRegs) { - DPRINTF(O3CPU,"[tid:%i] Suspending thread due to not enough " - "Phys. CC. Regs.\n", - tid); - ready = false; - } else if (commit.rob->numFreeEntries() >= - commit.rob->entryAmount(activeThreads.size() + 1)) { - DPRINTF(O3CPU,"[tid:%i] Suspending thread due to not enough " - "ROB entries.\n", - tid); - ready = false; - } else if (iew.instQueue.numFreeEntries() >= - iew.instQueue.entryAmount(activeThreads.size() + 1)) { - DPRINTF(O3CPU,"[tid:%i] Suspending thread due to not enough " - "IQ entries.\n", - tid); - ready = false; - } else if (iew.ldstQueue.numFreeLoadEntries() >= - iew.ldstQueue.entryAmount(activeThreads.size() + 1)) { - DPRINTF(O3CPU,"[tid:%i] Suspending thread due to not enough " - "LQ entries.\n", - tid); - ready = false; - } else if (iew.ldstQueue.numFreeStoreEntries() >= - iew.ldstQueue.entryAmount(activeThreads.size() + 1)) { - DPRINTF(O3CPU,"[tid:%i] Suspending thread due to not enough " - "SQ entries.\n", - tid); - ready = false; - } - - if (ready) { - insertThread(tid); - - contextSwitch = false; - - cpuWaitList.remove(tid); - } else { - suspendContext(tid); - - //blocks fetch - contextSwitch = true; - - //@todo: dont always add to waitlist - //do waitlist - cpuWaitList.push_back(tid); - } -} - template Fault FullO3CPU::hwrei(ThreadID tid) @@ -1243,19 +1088,6 @@ FullO3CPU::isDrained() const { bool drained(true); - for (ThreadID i = 0; i < thread.size(); ++i) { - if (activateThreadEvent[i].scheduled()) { - DPRINTF(Drain, "CPU not drained, tread %i has a " - "pending activate event\n", i); - drained = false; - } - if (deallocateContextEvent[i].scheduled()) { - DPRINTF(Drain, "CPU not drained, tread %i has a " - "pending deallocate context event\n", i); - drained = false; - } - } - if (!instList.empty() || !removeList.empty()) { DPRINTF(Drain, "Main CPU structures not drained.\n"); drained = false; @@ -1830,24 +1662,6 @@ FullO3CPU::getFreeTid() return InvalidThreadID; } -template -void -FullO3CPU::doContextSwitch() -{ - if (contextSwitch) { - - //ADD CODE TO DEACTIVE THREAD HERE (???) - - ThreadID size = cpuWaitList.size(); - for (ThreadID tid = 0; tid < size; tid++) { - activateWhenReady(tid); - } - - if (cpuWaitList.size() == 0) - contextSwitch = true; - } -} - template void FullO3CPU::updateThreadPriority() diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index cfed216c3..0fd08a68b 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -229,116 +229,6 @@ class FullO3CPU : public BaseO3CPU tickEvent.squash(); } - class ActivateThreadEvent : public Event - { - private: - /** Number of Thread to Activate */ - ThreadID tid; - - /** Pointer to the CPU. */ - FullO3CPU *cpu; - - public: - /** Constructs the event. */ - ActivateThreadEvent(); - - /** Initialize Event */ - void init(int thread_num, FullO3CPU *thread_cpu); - - /** Processes the event, calling activateThread() on the CPU. */ - void process(); - - /** Returns the description of the event. */ - const char *description() const; - }; - - /** Schedule thread to activate , regardless of its current state. */ - void - scheduleActivateThreadEvent(ThreadID tid, Cycles delay) - { - // Schedule thread to activate, regardless of its current state. - if (activateThreadEvent[tid].squashed()) - reschedule(activateThreadEvent[tid], - clockEdge(delay)); - else if (!activateThreadEvent[tid].scheduled()) { - Tick when = clockEdge(delay); - - // Check if the deallocateEvent is also scheduled, and make - // sure they do not happen at same time causing a sleep that - // is never woken from. - if (deallocateContextEvent[tid].scheduled() && - deallocateContextEvent[tid].when() == when) { - when++; - } - - schedule(activateThreadEvent[tid], when); - } - } - - /** Unschedule actiavte thread event, regardless of its current state. */ - void - unscheduleActivateThreadEvent(ThreadID tid) - { - if (activateThreadEvent[tid].scheduled()) - activateThreadEvent[tid].squash(); - } - - /** The tick event used for scheduling CPU ticks. */ - ActivateThreadEvent activateThreadEvent[Impl::MaxThreads]; - - class DeallocateContextEvent : public Event - { - private: - /** Number of Thread to deactivate */ - ThreadID tid; - - /** Should the thread be removed from the CPU? */ - bool remove; - - /** Pointer to the CPU. */ - FullO3CPU *cpu; - - public: - /** Constructs the event. */ - DeallocateContextEvent(); - - /** Initialize Event */ - void init(int thread_num, FullO3CPU *thread_cpu); - - /** Processes the event, calling activateThread() on the CPU. */ - void process(); - - /** Sets whether the thread should also be removed from the CPU. */ - void setRemove(bool _remove) { remove = _remove; } - - /** Returns the description of the event. */ - const char *description() const; - }; - - /** Schedule cpu to deallocate thread context.*/ - void - scheduleDeallocateContextEvent(ThreadID tid, bool remove, Cycles delay) - { - // Schedule thread to activate, regardless of its current state. - if (deallocateContextEvent[tid].squashed()) - reschedule(deallocateContextEvent[tid], - clockEdge(delay)); - else if (!deallocateContextEvent[tid].scheduled()) - schedule(deallocateContextEvent[tid], - clockEdge(delay)); - } - - /** Unschedule thread deallocation in CPU */ - void - unscheduleDeallocateContextEvent(ThreadID tid) - { - if (deallocateContextEvent[tid].scheduled()) - deallocateContextEvent[tid].squash(); - } - - /** The tick event used for scheduling CPU ticks. */ - DeallocateContextEvent deallocateContextEvent[Impl::MaxThreads]; - /** * Check if the pipeline has drained and signal the DrainManager. * @@ -430,7 +320,7 @@ class FullO3CPU : public BaseO3CPU virtual Counter totalOps() const; /** Add Thread to Active Threads List. */ - void activateContext(ThreadID tid, Cycles delay); + void activateContext(ThreadID tid); /** Remove Thread from Active Threads List */ void suspendContext(ThreadID tid); @@ -438,20 +328,13 @@ class FullO3CPU : public BaseO3CPU /** Remove Thread from Active Threads List && * Possibly Remove Thread Context from CPU. */ - bool scheduleDeallocateContext(ThreadID tid, bool remove, - Cycles delay = Cycles(1)); + void deallocateContext(ThreadID tid, bool remove); /** Remove Thread from Active Threads List && * Remove Thread Context from CPU. */ void haltContext(ThreadID tid); - /** Activate a Thread When CPU Resources are Available. */ - void activateWhenReady(ThreadID tid); - - /** Add or Remove a Thread Context in the CPU. */ - void doContextSwitch(); - /** Update The Order In Which We Process Threads. */ void updateThreadPriority(); @@ -792,9 +675,6 @@ class FullO3CPU : public BaseO3CPU /** Pointers to all of the threads in the CPU. */ std::vector thread; - /** Is there a context switch pending? */ - bool contextSwitch; - /** Threads Scheduled to Enter CPU */ std::list cpuWaitList; diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index b9e3b78c5..7319b38a5 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -811,10 +811,7 @@ DefaultFetch::checkStall(ThreadID tid) const { bool ret_val = false; - if (cpu->contextSwitch) { - DPRINTF(Fetch,"[tid:%i]: Stalling for a context switch.\n",tid); - ret_val = true; - } else if (stalls[tid].drain) { + if (stalls[tid].drain) { assert(cpu->isDraining()); DPRINTF(Fetch,"[tid:%i]: Drain stall detected.\n",tid); ret_val = true; @@ -970,9 +967,8 @@ DefaultFetch::tick() } // If there was activity this cycle, inform the CPU of it. - if (wroteToTimeBuffer || cpu->contextSwitch) { + if (wroteToTimeBuffer) { DPRINTF(Activity, "Activity this cycle.\n"); - cpu->activityThisCycle(); } diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index a00d2ffa3..b27fbb386 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -136,15 +136,14 @@ class O3ThreadContext : public ThreadContext virtual void setStatus(Status new_status) { thread->setStatus(new_status); } - /** Set the status to Active. Optional delay indicates number of - * cycles to wait before beginning execution. */ - virtual void activate(Cycles delay = Cycles(1)); + /** Set the status to Active. */ + virtual void activate(); /** Set the status to Suspended. */ - virtual void suspend(Cycles delay = Cycles(0)); + virtual void suspend(); /** Set the status to Halted. */ - virtual void halt(Cycles delay = Cycles(0)); + virtual void halt(); /** Dumps the function profiling information. * @todo: Implement. diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh index 43e903135..e6a3d5083 100755 --- a/src/cpu/o3/thread_context_impl.hh +++ b/src/cpu/o3/thread_context_impl.hh @@ -84,7 +84,7 @@ O3ThreadContext::takeOverFrom(ThreadContext *old_context) template void -O3ThreadContext::activate(Cycles delay) +O3ThreadContext::activate() { DPRINTF(O3CPU, "Calling activate on Thread Context %d\n", threadId()); @@ -96,12 +96,12 @@ O3ThreadContext::activate(Cycles delay) thread->setStatus(ThreadContext::Active); // status() == Suspended - cpu->activateContext(thread->threadId(), delay); + cpu->activateContext(thread->threadId()); } template void -O3ThreadContext::suspend(Cycles delay) +O3ThreadContext::suspend() { DPRINTF(O3CPU, "Calling suspend on Thread Context %d\n", threadId()); @@ -118,10 +118,9 @@ O3ThreadContext::suspend(Cycles delay) template void -O3ThreadContext::halt(Cycles delay) +O3ThreadContext::halt() { - DPRINTF(O3CPU, "Calling halt on Thread Context %d\n", - threadId()); + DPRINTF(O3CPU, "Calling halt on Thread Context %d\n", threadId()); if (thread->status() == ThreadContext::Halted) return; diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 0ac4a5495..5af3854e7 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -222,9 +222,9 @@ AtomicSimpleCPU::verifyMemoryMode() const } void -AtomicSimpleCPU::activateContext(ThreadID thread_num, Cycles delay) +AtomicSimpleCPU::activateContext(ThreadID thread_num) { - DPRINTF(SimpleCPU, "ActivateContext %d (%d cycles)\n", thread_num, delay); + DPRINTF(SimpleCPU, "ActivateContext %d\n", thread_num); assert(thread_num == 0); assert(thread); @@ -236,7 +236,7 @@ AtomicSimpleCPU::activateContext(ThreadID thread_num, Cycles delay) numCycles += ticksToCycles(thread->lastActivate - thread->lastSuspend); //Make sure ticks are still on multiples of cycles - schedule(tickEvent, clockEdge(delay)); + schedule(tickEvent, clockEdge(Cycles(0))); _status = BaseSimpleCPU::Running; } diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh index 91f558e06..a2f3927b4 100644 --- a/src/cpu/simple/atomic.hh +++ b/src/cpu/simple/atomic.hh @@ -200,7 +200,7 @@ class AtomicSimpleCPU : public BaseSimpleCPU void verifyMemoryMode() const; - virtual void activateContext(ThreadID thread_num, Cycles delay); + virtual void activateContext(ThreadID thread_num); virtual void suspendContext(ThreadID thread_num); Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags); diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 9c8f8b57a..9a9714bee 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -200,9 +200,9 @@ TimingSimpleCPU::verifyMemoryMode() const } void -TimingSimpleCPU::activateContext(ThreadID thread_num, Cycles delay) +TimingSimpleCPU::activateContext(ThreadID thread_num) { - DPRINTF(SimpleCPU, "ActivateContext %d (%d cycles)\n", thread_num, delay); + DPRINTF(SimpleCPU, "ActivateContext %d\n", thread_num); assert(thread_num == 0); assert(thread); @@ -213,7 +213,7 @@ TimingSimpleCPU::activateContext(ThreadID thread_num, Cycles delay) _status = BaseSimpleCPU::Running; // kick things off by initiating the fetch of the next instruction - schedule(fetchEvent, clockEdge(delay)); + schedule(fetchEvent, clockEdge(Cycles(0))); } diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index a7ea57c67..24f7002ff 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -271,7 +271,7 @@ class TimingSimpleCPU : public BaseSimpleCPU void verifyMemoryMode() const; - virtual void activateContext(ThreadID thread_num, Cycles delay); + virtual void activateContext(ThreadID thread_num); virtual void suspendContext(ThreadID thread_num); Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags); diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc index 4e2e70e63..55fe7e1a9 100644 --- a/src/cpu/simple_thread.cc +++ b/src/cpu/simple_thread.cc @@ -159,22 +159,14 @@ SimpleThread::dumpFuncProfile() } void -SimpleThread::activate(Cycles delay) +SimpleThread::activate() { if (status() == ThreadContext::Active) return; lastActivate = curTick(); - -// if (status() == ThreadContext::Unallocated) { -// cpu->activateWhenReady(_threadId); -// return; -// } - _status = ThreadContext::Active; - - // status() == Suspended - baseCpu->activateContext(_threadId, delay); + baseCpu->activateContext(_threadId); } void diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index 710a5af78..6b8f3063a 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -211,9 +211,8 @@ class SimpleThread : public ThreadState void setStatus(Status newStatus) { _status = newStatus; } - /// Set the status to Active. Optional delay indicates number of - /// cycles to wait before beginning execution. - void activate(Cycles delay = Cycles(1)); + /// Set the status to Active. + void activate(); /// Set the status to Suspended. void suspend(); diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh index 40150ac05..95d89dcc5 100644 --- a/src/cpu/thread_context.hh +++ b/src/cpu/thread_context.hh @@ -165,15 +165,14 @@ class ThreadContext virtual void setStatus(Status new_status) = 0; - /// Set the status to Active. Optional delay indicates number of - /// cycles to wait before beginning execution. - virtual void activate(Cycles delay = Cycles(1)) = 0; + /// Set the status to Active. + virtual void activate() = 0; /// Set the status to Suspended. - virtual void suspend(Cycles delay = Cycles(0)) = 0; + virtual void suspend() = 0; /// Set the status to Halted. - virtual void halt(Cycles delay = Cycles(0)) = 0; + virtual void halt() = 0; virtual void dumpFuncProfile() = 0; @@ -362,16 +361,14 @@ class ProxyThreadContext : public ThreadContext void setStatus(Status new_status) { actualTC->setStatus(new_status); } - /// Set the status to Active. Optional delay indicates number of - /// cycles to wait before beginning execution. - void activate(Cycles delay = Cycles(1)) - { actualTC->activate(delay); } + /// Set the status to Active. + void activate() { actualTC->activate(); } /// Set the status to Suspended. - void suspend(Cycles delay = Cycles(0)) { actualTC->suspend(); } + void suspend() { actualTC->suspend(); } /// Set the status to Halted. - void halt(Cycles delay = Cycles(0)) { actualTC->halt(); } + void halt() { actualTC->halt(); } void dumpFuncProfile() { actualTC->dumpFuncProfile(); } diff --git a/src/sim/process.cc b/src/sim/process.cc index 2ca1f1531..913e9298d 100644 --- a/src/sim/process.cc +++ b/src/sim/process.cc @@ -250,7 +250,7 @@ Process::initState() ThreadContext *tc = system->getThreadContext(contextIds[0]); // mark this context as active so it will start ticking. - tc->activate(Cycles(0)); + tc->activate(); pTable->initState(tc); } -- 2.30.2