From e1ada203148789b113811e51dbfa677dc04b6dd2 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 16 Jan 2021 14:51:37 +0000 Subject: [PATCH] --- openpower/sv/svp64.mdwn | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn index 053f6fa1b..31542c00c 100644 --- a/openpower/sv/svp64.mdwn +++ b/openpower/sv/svp64.mdwn @@ -521,16 +521,16 @@ CR encoding is essentially the same but made more complex due to CRs being bit-b Encoding shown MSB down to LSB -| R\*\_EXTRA3 | Mode | Range/Inc | 8..5 | 4..2 | 1..0 | -|-------------|------|---------------|-----------| --------|---------| -| 000 | Scalar | `CR0-CR7`/1 | 0b0000 | BA[4:2] | BA[1:0] | -| 001 | Scalar | `CR8-CR15`/1 | 0b0001 | BA[4:2] | BA[1:0] | -| 010 | Scalar | `CR16-CR23`/1 | 0b0010 | BA[4:2] | BA[1:0] | -| 011 | Scalar | `CR24-CR32`/1 | 0b0011 | BA[4:2] | BA[1:0] | -| 100 | Vector | `CR0-CR120`/8 | BA[4:2] 0 | 0b000 | BA[1:0] | -| 101 | Vector | `CR2-CR122`/8 | BA[4:2] 0 | 0b100 | BA[1:0] | -| 110 | Vector | `CR4-CR124`/8 | BA[4:2] 1 | 0b000 | BA[1:0] | -| 111 | Vector | `CR6-CR126`/8 | BA[4:2] 1 | 0b100 | BA[1:0] | +| Value | Mode | Range/Inc | 8..5 | 4..2 | 1..0 | +|-------|------|---------------|-----------| --------|---------| +| 000 | Scalar | `CR0-CR7`/1 | 0b0000 | BA[4:2] | BA[1:0] | +| 001 | Scalar | `CR8-CR15`/1 | 0b0001 | BA[4:2] | BA[1:0] | +| 010 | Scalar | `CR16-CR23`/1 | 0b0010 | BA[4:2] | BA[1:0] | +| 011 | Scalar | `CR24-CR32`/1 | 0b0011 | BA[4:2] | BA[1:0] | +| 100 | Vector | `CR0-CR112`/16 | BA[4:2] 0 | 0b000 | BA[1:0] | +| 101 | Vector | `CR4-CR116`/16 | BA[4:2] 0 | 0b100 | BA[1:0] | +| 110 | Vector | `CR8-CR120`/16 | BA[4:2] 1 | 0b000 | BA[1:0] | +| 111 | Vector | `CR12-CR124`/16 | BA[4:2] 1 | 0b100 | BA[1:0] | ## CR EXTRA2 @@ -538,12 +538,12 @@ CR encoding is essentially the same but made more complex due to CRs being bit-b Encoding shown MSB down to LSB -| R\*\_EXTRA2 | Mode | 7..5 | 4..2 | 1..0 | -|-------------|--------|---------|---------|---------| -| 00 | Scalar | 0b000 | BA[4:2] | BA[1:0] | -| 01 | Scalar | 0b001 | BA[4:2] | BA[1:0] | -| 10 | Vector | BA[4:2] | 0b000 | BA[1:0] | -| 11 | Vector | BA[4:2] | 0b100 | BA[1:0] | +| Value | Mode | Range/Inc | 8..5 | 4..2 | 1..0 | +|-------|--------|----------------|---------|---------|---------| +| 00 | Scalar | `CR0-CR7`/1 | 0b0000 | BA[4:2] | BA[1:0] | +| 01 | Scalar | `CR8-CR15`/1 | 0b0001 | BA[4:2] | BA[1:0] | +| 10 | Vector | `CR0-CR112`/16 | BA[4:2] 0 | 0b000 | BA[1:0] | +| 11 | Vector | `CR8-CR120`/16 | BA[4:2] 1 | 0b000 | BA[1:0] | # Appendix -- 2.30.2