From e26584b265dc2af4e95d23c4bdd89462ea508b69 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Sat, 1 Dec 2018 00:26:41 +0100 Subject: [PATCH] re PR testsuite/85368 (phi-opt-11 test fails on IBM Z) PR testsuite/85368 * params.def (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT): New param. * tree-ssa-ifcombine.c (ifcombine_ifandif): If --param logical-op-non-short-circuit is present, override LOGICAL_OP_NON_SHORT_CIRCUIT value from the param. * fold-const.c (fold_range_test, fold_truth_andor): Likewise. * lib/target-supports.exp (logical_op_short_circuit): Remove. * gcc.dg/builtin-bswap-7.c: Remove logical_op_short_circuit effective target, drop -mbranch-cost= options from the test and instead pass --param logical-op-non-short-circuit=0 or --param logical-op-non-short-circuit=1 depending on what the tests meant to test. * gcc.dg/pr21643.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise. * gcc.dg/tree-ssa/phi-opt-11.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise. * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise. * gcc.dg/tree-ssa/ssa-thread-14.c: Likewise. * gcc.dg/tree-ssa/vrp47.c: Likewise. * gcc.dg/tree-ssa/ssa-dom-thread-11.c: Likewise. * gcc.dg/tree-ssa/ssa-dom-thread-16.c: Likewise. * gcc.dg/tree-ssa/ssa-dom-thread-14.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise. * gcc.dg/tree-ssa/vrp87.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise. * gcc.dg/tree-ssa/phi-opt-2.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise. * gcc.dg/tree-ssa/ssa-thread-11.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise. * gcc.dg/tree-ssa/forwprop-28.c: Likewise. * gcc.dg/binop-xor1.c: Likewise. * gcc.dg/pr46309.c: Likewise. * gcc.dg/tree-ssa/ssa-dom-thread-18.c: New test. * gcc.dg/tree-ssa/reassoc-32.c: Add --param logical-op-non-short-circuit=1 to dg-options. * gcc.dg/tree-ssa/reassoc-33.c: Likewise. * gcc.dg/tree-ssa/reassoc-34.c: Likewise. * gcc.dg/tree-ssa/reassoc-35.c: Likewise. * gcc.dg/tree-ssa/reassoc-36.c: Likewise. From-SVN: r266700 --- gcc/ChangeLog | 9 +++++ gcc/fold-const.c | 21 ++++++---- gcc/params.def | 5 +++ gcc/testsuite/ChangeLog | 38 +++++++++++++++++++ gcc/testsuite/gcc.dg/binop-xor1.c | 4 +- gcc/testsuite/gcc.dg/builtin-bswap-7.c | 4 +- gcc/testsuite/gcc.dg/pr21643.c | 6 +-- gcc/testsuite/gcc.dg/pr46309.c | 8 +--- gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c | 4 +- gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c | 6 +-- gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c | 5 +-- gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c | 2 +- .../gcc.dg/tree-ssa/ssa-dom-thread-11.c | 4 +- .../gcc.dg/tree-ssa/ssa-dom-thread-14.c | 4 +- .../gcc.dg/tree-ssa/ssa-dom-thread-16.c | 4 +- .../gcc.dg/tree-ssa/ssa-dom-thread-18.c | 24 ++++++++++++ .../gcc.dg/tree-ssa/ssa-dom-thread-4.c | 25 +----------- .../gcc.dg/tree-ssa/ssa-ifcombine-13.c | 5 +-- .../gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c | 6 +-- .../gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c | 6 +-- .../gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c | 6 +-- .../gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c | 6 +-- .../gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c | 6 +-- .../gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c | 6 +-- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c | 4 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c | 5 +-- gcc/testsuite/gcc.dg/tree-ssa/vrp47.c | 7 +--- gcc/testsuite/gcc.dg/tree-ssa/vrp87.c | 5 +-- gcc/testsuite/lib/target-supports.exp | 23 ----------- gcc/tree-ssa-ifcombine.c | 7 +++- 34 files changed, 145 insertions(+), 128 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-18.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0bf512d35a9..f319daf14cf 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2018-11-30 Jakub Jelinek + + PR testsuite/85368 + * params.def (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT): New param. + * tree-ssa-ifcombine.c (ifcombine_ifandif): If + --param logical-op-non-short-circuit is present, override + LOGICAL_OP_NON_SHORT_CIRCUIT value from the param. + * fold-const.c (fold_range_test, fold_truth_andor): Likewise. + 2018-11-30 Jeff Law * optabs.c (expand_binop): Use "machine_mode" rather than diff --git a/gcc/fold-const.c b/gcc/fold-const.c index 5399288dfc5..45de94c93c5 100644 --- a/gcc/fold-const.c +++ b/gcc/fold-const.c @@ -5572,12 +5572,15 @@ fold_range_test (location_t loc, enum tree_code code, tree type, /* On machines where the branch cost is expensive, if this is a short-circuited branch and the underlying object on both sides is the same, make a non-short-circuit operation. */ - else if (LOGICAL_OP_NON_SHORT_CIRCUIT - && !flag_sanitize_coverage - && lhs != 0 && rhs != 0 - && (code == TRUTH_ANDIF_EXPR - || code == TRUTH_ORIF_EXPR) - && operand_equal_p (lhs, rhs, 0)) + bool logical_op_non_short_circuit = LOGICAL_OP_NON_SHORT_CIRCUIT; + if (PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT) != -1) + logical_op_non_short_circuit + = PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT); + if (logical_op_non_short_circuit + && !flag_sanitize_coverage + && lhs != 0 && rhs != 0 + && (code == TRUTH_ANDIF_EXPR || code == TRUTH_ORIF_EXPR) + && operand_equal_p (lhs, rhs, 0)) { /* If simple enough, just rewrite. Otherwise, make a SAVE_EXPR unless we are at top level or LHS contains a PLACEHOLDER_EXPR, in @@ -8229,7 +8232,11 @@ fold_truth_andor (location_t loc, enum tree_code code, tree type, if ((tem = fold_truth_andor_1 (loc, code, type, arg0, arg1)) != 0) return tem; - if (LOGICAL_OP_NON_SHORT_CIRCUIT + bool logical_op_non_short_circuit = LOGICAL_OP_NON_SHORT_CIRCUIT; + if (PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT) != -1) + logical_op_non_short_circuit + = PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT); + if (logical_op_non_short_circuit && !flag_sanitize_coverage && (code == TRUTH_AND_EXPR || code == TRUTH_ANDIF_EXPR diff --git a/gcc/params.def b/gcc/params.def index 11396a7f3af..982f180a312 100644 --- a/gcc/params.def +++ b/gcc/params.def @@ -1360,6 +1360,11 @@ DEFPARAM(PARAM_AVOID_FMA_MAX_BITS, "Maximum number of bits for which we avoid creating FMAs.", 0, 0, 512) +DEFPARAM(PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT, + "logical-op-non-short-circuit", + "True if a non-short-circuit operation is optimal.", + -1, -1, 1) + /* Local variables: diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 903f7cb3404..b48e353d05d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,41 @@ +2018-11-30 Jakub Jelinek + + PR testsuite/85368 + * lib/target-supports.exp (logical_op_short_circuit): Remove. + * gcc.dg/builtin-bswap-7.c: Remove logical_op_short_circuit + effective target, drop -mbranch-cost= options from the test and + instead pass --param logical-op-non-short-circuit=0 or + --param logical-op-non-short-circuit=1 depending on what the + tests meant to test. + * gcc.dg/pr21643.c: Likewise. + * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise. + * gcc.dg/tree-ssa/phi-opt-11.c: Likewise. + * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise. + * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Likewise. + * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise. + * gcc.dg/tree-ssa/ssa-thread-14.c: Likewise. + * gcc.dg/tree-ssa/vrp47.c: Likewise. + * gcc.dg/tree-ssa/ssa-dom-thread-11.c: Likewise. + * gcc.dg/tree-ssa/ssa-dom-thread-16.c: Likewise. + * gcc.dg/tree-ssa/ssa-dom-thread-14.c: Likewise. + * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise. + * gcc.dg/tree-ssa/vrp87.c: Likewise. + * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise. + * gcc.dg/tree-ssa/phi-opt-2.c: Likewise. + * gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise. + * gcc.dg/tree-ssa/ssa-thread-11.c: Likewise. + * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise. + * gcc.dg/tree-ssa/forwprop-28.c: Likewise. + * gcc.dg/binop-xor1.c: Likewise. + * gcc.dg/pr46309.c: Likewise. + * gcc.dg/tree-ssa/ssa-dom-thread-18.c: New test. + * gcc.dg/tree-ssa/reassoc-32.c: Add + --param logical-op-non-short-circuit=1 to dg-options. + * gcc.dg/tree-ssa/reassoc-33.c: Likewise. + * gcc.dg/tree-ssa/reassoc-34.c: Likewise. + * gcc.dg/tree-ssa/reassoc-35.c: Likewise. + * gcc.dg/tree-ssa/reassoc-36.c: Likewise. + 2018-11-30 Wilco Dijkstra PR middle-end/64242 diff --git a/gcc/testsuite/gcc.dg/binop-xor1.c b/gcc/testsuite/gcc.dg/binop-xor1.c index e2ea938dd91..dea11e50d5d 100644 --- a/gcc/testsuite/gcc.dg/binop-xor1.c +++ b/gcc/testsuite/gcc.dg/binop-xor1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fdump-tree-optimized" } */ +/* { dg-options "-O2 -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */ int foo (int a, int b, int c) @@ -7,4 +7,4 @@ foo (int a, int b, int c) return ((a && !b && c) || (!a && b && c)); } -/* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" { xfail logical_op_short_circuit } } } */ +/* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/builtin-bswap-7.c b/gcc/testsuite/gcc.dg/builtin-bswap-7.c index fe854416c40..35bcee37847 100644 --- a/gcc/testsuite/gcc.dg/builtin-bswap-7.c +++ b/gcc/testsuite/gcc.dg/builtin-bswap-7.c @@ -3,9 +3,9 @@ /* { dg-require-effective-target lp64 } */ /* { dg-options "-O -fdump-rtl-combine" } */ -/* The branch cost setting prevents the return value from being +/* The param setting prevents the return value from being calculated with arithmetic instead of doing a compare. */ -/* { dg-additional-options "-mbranch-cost=0" { target branch_cost } } */ +/* { dg-additional-options "--param logical-op-non-short-circuit=0" } */ #include diff --git a/gcc/testsuite/gcc.dg/pr21643.c b/gcc/testsuite/gcc.dg/pr21643.c index 8a721650aa3..4e7f93d351a 100644 --- a/gcc/testsuite/gcc.dg/pr21643.c +++ b/gcc/testsuite/gcc.dg/pr21643.c @@ -1,7 +1,6 @@ /* PR tree-optimization/21643 */ /* { dg-do compile } */ -/* { dg-options "-O2 -fdump-tree-reassoc1-details" } */ -/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ +/* { dg-options "-O2 -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */ int f1 (unsigned char c) @@ -87,5 +86,4 @@ f9 (unsigned char c) return 1; } -/* { dg-final { scan-tree-dump-times "Optimizing range tests c_\[0-9\]*.D. -.0, 31. and -.32, 32.\[\n\r\]* into" 6 "reassoc1" { target { ! logical_op_short_circuit } } } } */ -/* { dg-final { scan-tree-dump-times "Optimizing range tests c_\[0-9\]*.D. -.0, 31. and -.32, 32.\[\n\r\]* into" 5 "reassoc1" { target logical_op_short_circuit } } } */ +/* { dg-final { scan-tree-dump-times "Optimizing range tests c_\[0-9\]*.D. -.0, 31. and -.32, 32.\[\n\r\]* into" 6 "reassoc1" } } */ diff --git a/gcc/testsuite/gcc.dg/pr46309.c b/gcc/testsuite/gcc.dg/pr46309.c index c9645292c6f..615d6574ef9 100644 --- a/gcc/testsuite/gcc.dg/pr46309.c +++ b/gcc/testsuite/gcc.dg/pr46309.c @@ -1,10 +1,6 @@ /* PR tree-optimization/46309 */ -/* { dg-do compile { target { { ! logical_op_short_circuit } || { mips*-*-* avr*-*-* } } } } */ -/* { dg-options "-O2 -fdump-tree-reassoc-details" } */ -/* The transformation depends on BRANCH_COST being greater than 1 - (see the notes in the PR), so try to force that. */ -/* { dg-additional-options "-mtune=octeon2" { target mips*-*-* } } */ -/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-reassoc-details --param logical-op-non-short-circuit=1" } */ int f1 (int a) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c index aa70678f4cd..4f88a2674b6 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c @@ -1,7 +1,7 @@ /* Setting LOGICAL_OP_NON_SHORT_CIRCUIT to 0 leads to two conditional jumps when evaluating an && condition. VRP is not able to optimize this. */ -/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* } } } } } */ -/* { dg-options "-O2 -fdump-tree-forwprop1-details" } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-forwprop1-details --param logical-op-non-short-circuit=1" } */ extern char *frob (void); extern _Bool testit (void); diff --git a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c index cccb06927df..14c82cd5216 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -fdump-tree-optimized" } */ -/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ +/* { dg-options "-O1 -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */ int f(int a, int b, int c) { @@ -23,5 +22,4 @@ int h(int a, int b, int c, int d) return a; } -/* { dg-final { scan-tree-dump-times "if" 0 "optimized" { target { { ! logical_op_short_circuit } || branch_cost } } } } */ -/* { dg-final { scan-tree-dump-times "if" 2 "optimized" { target { logical_op_short_circuit && { ! branch_cost } } } } } */ +/* { dg-final { scan-tree-dump-times "if" 0 "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c index e0b26181038..5c7815e2c1a 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -fdump-tree-optimized" } */ -/* { dg-additional-options "-mbranch-cost=1" { target branch_cost } } */ +/* { dg-options "-O1 -fdump-tree-optimized --param logical-op-non-short-circuit=0" } */ _Bool f1(_Bool a, _Bool b) { @@ -21,4 +20,4 @@ _Bool f1(_Bool a, _Bool b) which can be fixed in a different patch). Test this only when known to be !LOGICAL_OP_NON_SHORT_CIRCUIT, otherwise ifcombine may convert this into return a & b;. */ -/* { dg-final { scan-tree-dump-times "if" 1 "optimized" { target { i?86-*-* x86_64-*-* mips*-*-* s390*-*-* avr*-*-* } } } } */ +/* { dg-final { scan-tree-dump-times "if" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c index b6ca8e2bb39..944362ad076 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c @@ -1,6 +1,6 @@ /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */ -/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */ +/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */ /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c index 243508c872c..28cd7799ce1 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c @@ -1,6 +1,6 @@ /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k-*-*-*"} } } */ -/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */ +/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */ /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ int test (int a, int b, int c) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c index 24070046ef2..f1087113f51 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c @@ -1,6 +1,6 @@ /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k*-*-*"} } } */ -/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */ +/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */ /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ int test (int a, int b, int c) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c index e5ba101e001..98ea2ad9ebe 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c @@ -1,6 +1,6 @@ /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k*-*-*"} } } */ -/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */ +/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */ /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ int test (unsigned int a, int b, int c) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c index 4df5840859c..d9184102383 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c @@ -1,6 +1,6 @@ /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* or1k*-*-*"} } } */ -/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */ +/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */ /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ int test (int a, int b, int c) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c index f42d64bed71..5f90613263d 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-11.c @@ -1,5 +1,5 @@ -/* { dg-do compile { target { ! logical_op_short_circuit } } } */ -/* { dg-options "-O2 -fdump-tree-dom2-details" } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-dom2-details --param logical-op-non-short-circuit=1" } */ static int *bb_ticks; extern void frob (void); diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c index 2d97f86fa28..4e6a911506e 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-14.c @@ -1,5 +1,5 @@ -/* { dg-do compile { target { ! logical_op_short_circuit } } } */ -/* { dg-options "-O2 -fdump-tree-dom2-details -w" } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-dom2-details -w --param logical-op-non-short-circuit=1" } */ enum optab_methods { diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c index e2e0d20fb9f..ffbdc988e0a 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-16.c @@ -1,5 +1,5 @@ -/* { dg-do compile { target { ! logical_op_short_circuit } } } */ -/* { dg-options "-O2 -fdump-tree-dom2-details -w" } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-dom2-details -w --param logical-op-non-short-circuit=1" } */ unsigned char validate_subreg (unsigned int offset, unsigned int isize, unsigned int osize, int zz, int qq) { diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-18.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-18.c new file mode 100644 index 00000000000..d4759b8903b --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-18.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-vrp1-details -fdump-tree-dom2-details -std=gnu89 --param logical-op-non-short-circuit=0" } */ + +#include "ssa-dom-thread-4.c" + +/* On targets that define LOGICAL_OP_NON_SHORT_CIRCUIT to 0, we split both + "a_elt || b_elt" and "b_elt && kill_elt" into two conditions each, + rather than using "(var1 != 0) op (var2 != 0)". Also, as on other targets, + we duplicate the header of the inner "while" loop. There are then + 4 threading opportunities: + + 1x "!a_elt && b_elt" in the outer "while" loop + -> the start of the inner "while" loop, + skipping the known-true "b_elt" in the first condition. + 1x "!b_elt" in the first condition + -> the outer "while" loop's continuation point, + skipping the known-false "b_elt" in the second condition. + 2x "kill_elt->indx >= b_elt->indx" in the first "while" loop + -> "kill_elt->indx == b_elt->indx" in the second condition, + skipping the known-true "b_elt && kill_elt" in the second + condition. + + All the cases are picked up by VRP1 as jump threads. */ +/* { dg-final { scan-tree-dump-times "Threaded" 4 "vrp1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c index e13eb8673dd..521754f8d79 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fdump-tree-vrp1-details -fdump-tree-dom2-details -std=gnu89" } */ +/* { dg-options "-O2 -fdump-tree-vrp1-details -fdump-tree-dom2-details -std=gnu89 --param logical-op-non-short-circuit=1" } */ struct bitmap_head_def; typedef struct bitmap_head_def *bitmap; typedef const struct bitmap_head_def *const_bitmap; @@ -58,25 +58,4 @@ bitmap_ior_and_compl (bitmap dst, const_bitmap a, const_bitmap b, code we missed the edge when the first conditional is false (b_elt is zero, which means the second conditional is always zero. VRP1 catches all three. */ -/* { dg-final { scan-tree-dump-times "Threaded" 3 "vrp1" { target { ! logical_op_short_circuit } } } } */ - -/* On targets that define LOGICAL_OP_NON_SHORT_CIRCUIT to 0, we split both - "a_elt || b_elt" and "b_elt && kill_elt" into two conditions each, - rather than using "(var1 != 0) op (var2 != 0)". Also, as on other targets, - we duplicate the header of the inner "while" loop. There are then - 4 threading opportunities: - - 1x "!a_elt && b_elt" in the outer "while" loop - -> the start of the inner "while" loop, - skipping the known-true "b_elt" in the first condition. - 1x "!b_elt" in the first condition - -> the outer "while" loop's continuation point, - skipping the known-false "b_elt" in the second condition. - 2x "kill_elt->indx >= b_elt->indx" in the first "while" loop - -> "kill_elt->indx == b_elt->indx" in the second condition, - skipping the known-true "b_elt && kill_elt" in the second - condition. - - All the cases are picked up by VRP1 as jump threads. */ -/* { dg-final { scan-tree-dump-times "Threaded" 4 "vrp1" { target logical_op_short_circuit } } } */ - +/* { dg-final { scan-tree-dump-times "Threaded" 3 "vrp1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c index 5f3147a8c00..425eb3d6481 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -fdump-tree-optimized-details-blocks" } */ -/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ +/* { dg-options "-O1 -fdump-tree-optimized-details-blocks --param logical-op-non-short-circuit=1" } */ _Bool f1(_Bool a, _Bool b) { @@ -17,5 +16,5 @@ _Bool f1(_Bool a, _Bool b) /* For LOGICAL_OP_NON_SHORT_CIRCUIT, this should be optimized into return a & b;, with no ifs. */ -/* { dg-final { scan-tree-dump-not "if" "optimized" { target { i?86-*-* x86_64-*-* s390*-*-* avr*-*-* } } } } */ +/* { dg-final { scan-tree-dump-not "if" "optimized" } } */ /* { dg-final { scan-tree-dump-not "Invalid sum" "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c index 1714fcf97c0..a550d00fd22 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c @@ -1,7 +1,5 @@ -/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */ - -/* { dg-options "-O2 -g -fdump-tree-optimized" } */ -/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */ int t (int a, int b) { diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c index f35ec5edac2..6d947c1604b 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c @@ -1,7 +1,5 @@ -/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */ - -/* { dg-options "-O2 -g -fdump-tree-optimized" } */ -/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */ int t (int a, int b) { diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c index d84bdd51c74..353e4176cc2 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c @@ -1,7 +1,5 @@ -/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */ - -/* { dg-options "-O2 -g -fdump-tree-optimized" } */ -/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */ int t (int a, int b) { diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c index be0ee264e35..76f40178d37 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c @@ -1,7 +1,5 @@ -/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */ - -/* { dg-options "-O2 -g -fdump-tree-optimized" } */ -/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */ int t (int a, int b) { diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c index 09c22abb071..0c048335237 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c @@ -1,7 +1,5 @@ -/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */ - -/* { dg-options "-O2 -g -fdump-tree-optimized" } */ -/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */ int t (int a, int b, int c) { diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c index a0dc82db156..02404a6679f 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c @@ -1,7 +1,5 @@ -/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */ - -/* { dg-options "-O2 -g -fdump-tree-optimized" } */ -/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -g -fdump-tree-optimized --param logical-op-non-short-circuit=1" } */ int t (int a, int b, int c) { diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c index 70decd184a7..67e1e89ecd3 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-11.c @@ -1,5 +1,5 @@ -/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* bfin*-*-* v850*-*-* moxie*-*-* m32c*-*-* fr30*-*-* mcore*-*-* frv-*-* h8300-*-* m32r-*-* mn10300-*-* msp430-*-* pdp11-*-* rl78-*-* rx-*-* vax-*-*} } } } } */ -/* { dg-options "-O2 -fdump-tree-vrp2-details" } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-vrp2-details --param logical-op-non-short-circuit=1" } */ /* { dg-final { scan-tree-dump-not "IRREDUCIBLE_LOOP" "vrp2" } } */ void abort (void); diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c index f12fb07e604..38661c88822 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-14.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-* riscv*-*-* } } } } } */ -/* { dg-additional-options "-O2 -fdump-tree-vrp-details" } */ -/* { dg-additional-options "-mbranch-cost=2" { target i?86-*-* x86_64-*-* } } */ +/* { dg-do compile } */ +/* { dg-additional-options "-O2 -fdump-tree-vrp-details --param logical-op-non-short-circuit=1" } */ /* { dg-final { scan-tree-dump-times "Threaded jump" 8 "vrp1" } } */ void foo (void); diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp47.c b/gcc/testsuite/gcc.dg/tree-ssa/vrp47.c index 28a8808e8e9..eb7546c4873 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/vrp47.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp47.c @@ -1,10 +1,7 @@ /* Setting LOGICAL_OP_NON_SHORT_CIRCUIT to 0 inhibits the setcc optimizations that expose the VRP opportunity. */ -/* Skip on S/390. Lower values in BRANCH_COST lead to two conditional - jumps when evaluating an && condition. VRP is not able to optimize - this. */ -/* { dg-do compile { target { ! { logical_op_short_circuit || { s390*-*-* mn10300-*-* hppa*-*-* m68k*-*-* } } } } } */ -/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom2 -fdump-tree-vrp2" } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom2 -fdump-tree-vrp2 --param logical-op-non-short-circuit=1" } */ /* { dg-additional-options "-march=i586" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ int h(int x, int y) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp87.c b/gcc/testsuite/gcc.dg/tree-ssa/vrp87.c index 1080ab1723b..da1d0a2d80c 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/vrp87.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp87.c @@ -1,8 +1,7 @@ /* Setting LOGICAL_OP_NON_SHORT_CIRCUIT to 0 leads to two conditional jumps when evaluating an && condition. */ -/* { dg-do compile { target { ! { logical_op_short_circuit || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* } } } } } */ - -/* { dg-options "-O2 -fdump-tree-fre1-details" } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-fre1-details --param logical-op-non-short-circuit=1" } */ struct bitmap_head_def; typedef struct bitmap_head_def *bitmap; diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 3baa2da25ea..faa67e22321 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -8487,29 +8487,6 @@ proc check_effective_target_tiny {} { }] } -# Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target. - -proc check_effective_target_logical_op_short_circuit {} { - if { [istarget mips*-*-*] - || [istarget arc*-*-*] - || [istarget avr*-*-*] - || [istarget crisv32-*-*] || [istarget cris-*-*] - || [istarget csky*-*-*] - || [istarget mmix-*-*] - || [istarget msp430-*-*] - || [istarget s390*-*-*] - || [istarget powerpc*-*-*] - || [istarget nios2*-*-*] - || [istarget riscv*-*-*] - || [istarget v850*-*-*] - || [istarget visium-*-*] - || [istarget or1k*-*-*] - || [check_effective_target_arm_cortex_m] } { - return 1 - } - return 0 -} - # Return 1 if the target supports -mbranch-cost=N option. proc check_effective_target_branch_cost {} { diff --git a/gcc/tree-ssa-ifcombine.c b/gcc/tree-ssa-ifcombine.c index 2b969378d65..ddb9564298b 100644 --- a/gcc/tree-ssa-ifcombine.c +++ b/gcc/tree-ssa-ifcombine.c @@ -40,6 +40,7 @@ along with GCC; see the file COPYING3. If not see #include "gimplify-me.h" #include "tree-cfg.h" #include "tree-ssa.h" +#include "params.h" #ifndef LOGICAL_OP_NON_SHORT_CIRCUIT #define LOGICAL_OP_NON_SHORT_CIRCUIT \ @@ -563,7 +564,11 @@ ifcombine_ifandif (basic_block inner_cond_bb, bool inner_inv, { tree t1, t2; gimple_stmt_iterator gsi; - if (!LOGICAL_OP_NON_SHORT_CIRCUIT || flag_sanitize_coverage) + bool logical_op_non_short_circuit = LOGICAL_OP_NON_SHORT_CIRCUIT; + if (PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT) != -1) + logical_op_non_short_circuit + = PARAM_VALUE (PARAM_LOGICAL_OP_NON_SHORT_CIRCUIT); + if (!logical_op_non_short_circuit || flag_sanitize_coverage) return false; /* Only do this optimization if the inner bb contains only the conditional. */ if (!gsi_one_before_end_p (gsi_start_nondebug_after_labels_bb (inner_cond_bb))) -- 2.30.2