From e27cf2e372651997c3b46a5662dd4d47c53dd13b Mon Sep 17 00:00:00 2001 From: Mihail Ionescu Date: Tue, 14 Jan 2020 18:00:35 +0000 Subject: [PATCH] [PATCH, GCC/ARM, 2/10] Add command line support for Armv8.1-M Mainline Besides the expected enabling of the new value for the -march command-line option (-march=armv8.1-m.main) and its extensions (see below), this patch disables support of the Security Extensions for this newly added architecture. This is done both by not including the cmse bit in the architecture description and by throwing an error message when user request Armv8.1-M Mainline Security Extensions. Note that Armv8-M Baseline and Mainline Security Extensions are still enabled. Only extensions for already supported instructions are implemented in this patch. Other extensions (MVE integer and float) will be added in separate patches. The following configurations are allowed for Armv8.1-M Mainline with regards to FPU and implemented in this patch: + no FPU (+nofp) + single precision VFPv5 with FP16 (+fp) + double precision VFPv5 with FP16 (+fp.dp) ChangeLog entry are as follow: *** gcc/ChangeLog *** 2020-01-16 Mihail-Calin Ionescu 2020-01-16 Thomas Preud'homme * config/arm/arm-cpus.in (armv8_1m_main): New feature. (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k, ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve, ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a, ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent. (ARMv8_1m_main): New feature group. (armv8.1-m.main): New architecture. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize. (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main. (arm_options_perform_arch_sanity_checks): Error out when targeting Armv8.1-M Mainline Security Extensions. * config/arm/arm.h (arm_arch8_1m_main): Declare. *** gcc/testsuite/ChangeLog *** 2020-01-16 Mihail-Calin Ionescu 2020-01-16 Thomas Preud'homme * lib/target-supports.exp (check_effective_target_arm_arch_v8_1m_main_ok): Define. (add_options_for_arm_arch_v8_1m_main): Likewise. (check_effective_target_arm_arch_v8_1m_main_multilib): Likewise. --- gcc/ChangeLog | 17 +++++++++++ gcc/config/arm/arm-cpus.in | 44 +++++++++++++++++++-------- gcc/config/arm/arm-tables.opt | 2 +- gcc/config/arm/arm.c | 8 +++++ gcc/config/arm/arm.h | 4 +++ gcc/doc/invoke.texi | 13 ++++++++ gcc/testsuite/ChangeLog | 8 +++++ gcc/testsuite/lib/target-supports.exp | 3 +- 8 files changed, 84 insertions(+), 15 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d11b8d3e62a..d2d29cc9e06 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +2020-01-16 Mihail-Calin Ionescu +2020-01-16 Thomas Preud'homme + + * config/arm/arm-cpus.in (armv8_1m_main): New feature. + (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k, + ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve, + ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a, + ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent. + (ARMv8_1m_main): New feature group. + (armv8.1-m.main): New architecture. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize. + (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main. + (arm_options_perform_arch_sanity_checks): Error out when targeting + Armv8.1-M Mainline Security Extensions. + * config/arm/arm.h (arm_arch8_1m_main): Declare. + 2020-01-16 Stam Markianos-Wright * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot, diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index 24a9f3e86bb..fdf336a5930 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -129,6 +129,9 @@ define feature armv8_6 # M-Profile security extensions. define feature cmse +# Architecture rel 8.1-M. +define feature armv8_1m_main + # Floating point and Neon extensions. # VFPv1 is not supported in GCC. @@ -235,21 +238,21 @@ define fgroup ALL_FPU_EXTERNAL fp16 bf16 # Everything related to the FPU extensions (FP or SIMD). define fgroup ALL_FP ALL_FPU_EXTERNAL ALL_FPU_INTERNAL ALL_SIMD -define fgroup ARMv4 armv4 notm -define fgroup ARMv4t ARMv4 thumb -define fgroup ARMv5t ARMv4t armv5t -define fgroup ARMv5te ARMv5t armv5te -define fgroup ARMv5tej ARMv5te -define fgroup ARMv6 ARMv5te armv6 be8 -define fgroup ARMv6j ARMv6 -define fgroup ARMv6k ARMv6 armv6k -define fgroup ARMv6z ARMv6 -define fgroup ARMv6kz ARMv6k quirk_armv6kz -define fgroup ARMv6zk ARMv6k -define fgroup ARMv6t2 ARMv6 thumb2 +define fgroup ARMv4 armv4 notm +define fgroup ARMv4t ARMv4 thumb +define fgroup ARMv5t ARMv4t armv5t +define fgroup ARMv5te ARMv5t armv5te +define fgroup ARMv5tej ARMv5te +define fgroup ARMv6 ARMv5te armv6 be8 +define fgroup ARMv6j ARMv6 +define fgroup ARMv6k ARMv6 armv6k +define fgroup ARMv6z ARMv6 +define fgroup ARMv6kz ARMv6k quirk_armv6kz +define fgroup ARMv6zk ARMv6k +define fgroup ARMv6t2 ARMv6 thumb2 # This is suspect. ARMv6-m doesn't really pull in any useful features # from ARMv5* or ARMv6. -define fgroup ARMv6m armv4 thumb armv5t armv5te armv6 be8 +define fgroup ARMv6m armv4 thumb armv5t armv5te armv6 be8 # This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and # integer SIMD instructions that are in ARMv6T2. */ define fgroup ARMv7 ARMv6m thumb2 armv7 @@ -269,6 +272,10 @@ define fgroup ARMv8_6a ARMv8_5a armv8_6 define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv define fgroup ARMv8m_main ARMv7m armv8 cmse define fgroup ARMv8r ARMv8a +# Feature cmse is omitted to disable Security Extensions support while secure +# code compiled by GCC does not preserve FP context as allowed by Armv8.1-M +# Mainline. +define fgroup ARMv8_1m_main ARMv7m armv8 armv8_1m_main # Useful combinations. define fgroup VFPv2 vfpv2 @@ -680,6 +687,17 @@ begin arch armv8-r option nofp remove ALL_FP end arch armv8-r +begin arch armv8.1-m.main + tune for cortex-m7 + tune flags CO_PROC + base 8M_MAIN + isa ARMv8_1m_main +# fp => FPv5-sp-d16; fp.dp => FPv5-d16 + option fp add FPv5 fp16 + option fp.dp add FPv5 FP_DBL fp16 + option nofp remove ALL_FP +end arch armv8.1-m.main + begin arch iwmmxt tune for iwmmxt tune flags LDSCHED STRONG XSCALE diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index d8110919598..f295a4cffa2 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -353,7 +353,7 @@ EnumValue Enum(arm_arch) String(armv8-m.main) Value(28) EnumValue -Enum(arm_arch) String(armv8-r) Value(29) +Enum(arm_arch) String(armv8.1-m.main) Value(29) EnumValue Enum(arm_arch) String(iwmmxt) Value(30) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 07231d722b9..a7242b2cdef 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -914,6 +914,9 @@ int arm_arch8_3 = 0; /* Nonzero if this chip supports the ARM Architecture 8.4 extensions. */ int arm_arch8_4 = 0; +/* Nonzero if this chip supports the ARM Architecture 8.1-M Mainline + extensions. */ +int arm_arch8_1m_main = 0; /* Nonzero if this chip supports the FP16 instructions extension of ARM Architecture 8.2. */ @@ -3674,6 +3677,8 @@ arm_option_reconfigure_globals (void) arm_arch8_2 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_2); arm_arch8_3 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_3); arm_arch8_4 = bitmap_bit_p (arm_active_target.isa, isa_bit_armv8_4); + arm_arch8_1m_main = bitmap_bit_p (arm_active_target.isa, + isa_bit_armv8_1m_main); arm_arch_thumb1 = bitmap_bit_p (arm_active_target.isa, isa_bit_thumb); arm_arch_thumb2 = bitmap_bit_p (arm_active_target.isa, isa_bit_thumb2); arm_arch_xscale = bitmap_bit_p (arm_active_target.isa, isa_bit_xscale); @@ -3762,6 +3767,9 @@ arm_options_perform_arch_sanity_checks (void) if (!arm_arch4 && arm_fp16_format != ARM_FP16_FORMAT_NONE) sorry ("__fp16 and no ldrh"); + if (use_cmse && arm_arch8_1m_main) + error ("Armv8.1-M Mainline Security Extensions are unsupported"); + if (use_cmse && !arm_arch_cmse) error ("target CPU does not support ARMv8-M Security Extensions"); diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 8bf393e620f..e1cce23f7ef 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -465,6 +465,10 @@ extern int arm_arch8_3; /* Nonzero if this chip supports the ARM Architecture 8.4 extensions. */ extern int arm_arch8_4; +/* Nonzero if this chip supports the ARM Architecture 8.1-M Mainline + extensions. */ +extern int arm_arch8_1m_main; + /* Nonzero if this chip supports the FP16 instructions extension of ARM Architecture 8.2. */ extern int arm_fp16_inst; diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index d8b94d837a9..b0c153afb86 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -18095,6 +18095,7 @@ Permissible names are: @samp{armv6-m}, @samp{armv6s-m}, @samp{armv7-m}, @samp{armv7e-m}, @samp{armv8-m.base}, @samp{armv8-m.main}, +@samp{armv8.1-m.main}, @samp{iwmmxt} and @samp{iwmmxt2}. Additionally, the following architectures, which lack support for the @@ -18485,6 +18486,18 @@ The single- and double-precision FPv5 floating-point instructions. Disable the floating-point extensions. @end table +@item armv8.1-m.main +@table @samp +@item +fp +The single-precision floating-point instructions. + +@item +fp.dp +The single- and double-precision floating-point instructions. + +@item +nofp +Disable the floating-point extension. +@end table + @item armv8-m.main @table @samp @item +dsp diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e5963d21333..e6d2cd5995f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2020-01-16 Mihail-Calin Ionescu +2020-01-16 Thomas Preud'homme + + * lib/target-supports.exp + (check_effective_target_arm_arch_v8_1m_main_ok): Define. + (add_options_for_arm_arch_v8_1m_main): Likewise. + (check_effective_target_arm_arch_v8_1m_main_multilib): Likewise. + 2020-01-16 Stam Markianos-Wright * gcc.target/aarch64/advsimd-intrinsics/bfdot-1.c: New. diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 62a745a7c7e..b247d943e0c 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -4352,10 +4352,11 @@ foreach { armfunc armflag armdefs } { v8a "-march=armv8-a" __ARM_ARCH_8A__ v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__ v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__ + v8r "-march=armv8-r" __ARM_ARCH_8R__ v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft" __ARM_ARCH_8M_BASE__ v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ - v8r "-march=armv8-r" __ARM_ARCH_8R__ } { + v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } { eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] { proc check_effective_target_arm_arch_FUNC_ok { } { return [check_no_compiler_messages arm_arch_FUNC_ok assembly { -- 2.30.2