From e2d156ef6497705e50b862c653612b0c1a528aef Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Fri, 15 Mar 2013 19:49:24 +0100 Subject: [PATCH] genlib/cdc/MultiReg: remove idomain --- examples/basic/psync.py | 2 +- examples/basic/simple_gpio.py | 2 +- migen/genlib/cdc.py | 10 ++++------ 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/examples/basic/psync.py b/examples/basic/psync.py index 444c6274..59422d5e 100644 --- a/examples/basic/psync.py +++ b/examples/basic/psync.py @@ -12,7 +12,7 @@ class XilinxMultiRegImpl(MultiRegImpl): class XilinxMultiReg: @staticmethod def lower(dr): - return XilinxMultiRegImpl(dr.i, dr.idomain, dr.o, dr.odomain, dr.n) + return XilinxMultiRegImpl(dr.i, dr.o, dr.odomain, dr.n) ps = PulseSynchronizer("from", "to") v = verilog.convert(ps, {ps.i, ps.o}, special_overrides={MultiReg: XilinxMultiReg}) diff --git a/examples/basic/simple_gpio.py b/examples/basic/simple_gpio.py index 4dc4f5fb..0576473c 100644 --- a/examples/basic/simple_gpio.py +++ b/examples/basic/simple_gpio.py @@ -17,7 +17,7 @@ class Example(Module): ### gpio_in_s = Signal(ninputs) - self.specials += MultiReg(self.gpio_in, "ext", gpio_in_s, "sys") + self.specials += MultiReg(self.gpio_in, gpio_in_s, "sys") self.comb += [ r_i.field.w.eq(gpio_in_s), self.gpio_out.eq(r_o.field.r) diff --git a/migen/genlib/cdc.py b/migen/genlib/cdc.py index d28b9840..632b337e 100644 --- a/migen/genlib/cdc.py +++ b/migen/genlib/cdc.py @@ -3,9 +3,8 @@ from migen.fhdl.specials import Special from migen.fhdl.tools import value_bits_sign, list_signals class MultiRegImpl: - def __init__(self, i, idomain, o, odomain, n): + def __init__(self, i, o, odomain, n): self.i = i - self.idomain = idomain self.o = o self.odomain = odomain @@ -24,10 +23,9 @@ class MultiRegImpl: return Fragment(comb, {self.odomain: o_sync}) class MultiReg(Special): - def __init__(self, i, idomain, o, odomain, n=2): + def __init__(self, i, o, odomain, n=2): Special.__init__(self) self.i = i - self.idomain = idomain self.o = o self.odomain = odomain self.n = n @@ -42,7 +40,7 @@ class MultiReg(Special): @staticmethod def lower(dr): - return MultiRegImpl(dr.i, dr.idomain, dr.o, dr.odomain, dr.n) + return MultiRegImpl(dr.i, dr.o, dr.odomain, dr.n) class PulseSynchronizer: def __init__(self, idomain, odomain): @@ -66,4 +64,4 @@ class PulseSynchronizer: ] return Fragment(comb, {self.idomain: sync_i, self.odomain: sync_o}, - specials={MultiReg(toggle_i, self.idomain, toggle_o, self.odomain)}) + specials={MultiReg(toggle_i, toggle_o, self.odomain)}) -- 2.30.2