From e2e6e8f042d9a88801caa2a24c1bfd8e1cfaaa51 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 9 Apr 2022 21:46:38 +0100 Subject: [PATCH] --- openpower/sv/svp64/appendix.mdwn | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn index bfbae889a..59c430468 100644 --- a/openpower/sv/svp64/appendix.mdwn +++ b/openpower/sv/svp64/appendix.mdwn @@ -142,17 +142,21 @@ and if less than or equal to three then that instruction could be given an EXTRA3 designation. Four or more is given an EXTRA2 designation because there are only 9 bits available. -Thirdly, a packing format was decided: for 2R-1W an EXTRA3 indexing +Thirdly, the instruction was analysed to see if Twin or Single +Predication was suitable. As a general rule this was if there +was only a single operand and a single result (`extw` and LD/ST) +however it was found that some 2 or 3 operand instructions also +qualify. Given that 3 of the 9 bits of EXTRA had to be sacrificed for use +in Twin Predication, some compromises were made, here. + +Fourthly, a packing format was decided: for 2R-1W an EXTRA3 indexing could have been decided that RA would be indexed 0 (EXTRA bits 0-2), RB indexed 1 (EXTRA bits 3-5) and RT indexed 2 (EXTRA bits 6-8). In some cases (LD/ST with update) RA-as-a-source is given a **different** EXTRA index from RA-as-a-result -(because it is possible to do, and perceived to be useful). - -Fourthly, the instruction was analysed to see if Twin or Single -Predication was suitable. As a general rule this was if there -was only a single operand and a single result (`extw` and LD/ST) -however some 2 or 3 operand instructions also qualify. +(because it is possible to do, and perceived to be useful). Rc=1 +co-results (CR0, CR1) are always given the same EXTRA index as their +main result (RT, FRT). Fifthly, in an automated process the results of the analysis were outputted in CSV Format for use in machine-readable form -- 2.30.2