From e2ec05a6c96065358c2afaafd2c62dc1f1a2db4d Mon Sep 17 00:00:00 2001 From: Torbjorn Granlund Date: Thu, 21 Feb 2002 19:27:50 +0000 Subject: [PATCH] avr.md: Add more patterns for mized-mode add and subtract (addsi3_zero_extend... * config/avr/avr.md: Add more patterns for mized-mode add and subtract (addsi3_zero_extend, subhi3_zero_extend1, subsi3_zero_extend). From-SVN: r49936 --- gcc/ChangeLog | 5 +++++ gcc/config/avr/avr.md | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e1984f4d110..e64cbb96a81 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2002-02-20 Torbjorn Granlund + + * config/avr/avr.md: Add more patterns for mized-mode add and subtract + (addsi3_zero_extend, subhi3_zero_extend1, subsi3_zero_extend). + Thu Feb 21 16:20:46 2002 Alexandre Oliva * rtlanal.c (replace_rtx): Don't make a CONST_INT the operand of diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 3c1432d9002..f432f0e3778 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -605,6 +605,19 @@ [(set_attr "length" "4,3,3,4,5,5") (set_attr "cc" "set_n,set_n,set_czn,set_czn,set_n,set_n")]) +(define_insn "*addsi3_zero_extend" + [(set (match_operand:SI 0 "register_operand" "=r") + (plus:SI (zero_extend:SI + (match_operand:QI 1 "register_operand" "r")) + (match_operand:SI 2 "register_operand" "0")))] + "" + "add %A0,%1 + adc %B0,__zero_reg__ + adc %C0,__zero_reg__ + adc %D0,__zero_reg__" + [(set_attr "length" "4") + (set_attr "cc" "set_n")]) + ;----------------------------------------------------------------------------- ; sub bytes (define_insn "subqi3" @@ -629,6 +642,17 @@ [(set_attr "length" "2,2") (set_attr "cc" "set_czn,set_czn")]) +(define_insn "*subhi3_zero_extend1" + [(set (match_operand:HI 0 "register_operand" "=r") + (minus:HI (match_operand:HI 1 "register_operand" "0") + (zero_extend:HI + (match_operand:QI 2 "register_operand" "r"))))] + "" + "sub %A0,%2 + sbc %B0,__zero_reg__" + [(set_attr "length" "2") + (set_attr "cc" "set_n")]) + (define_insn "subsi3" [(set (match_operand:SI 0 "register_operand" "=r,d") (minus:SI (match_operand:SI 1 "register_operand" "0,0") @@ -640,6 +664,19 @@ [(set_attr "length" "4,4") (set_attr "cc" "set_czn,set_czn")]) +(define_insn "*subsi3_zero_extend" + [(set (match_operand:SI 0 "register_operand" "=r") + (minus:SI (match_operand:SI 1 "register_operand" "0") + (zero_extend:SI + (match_operand:QI 2 "register_operand" "r"))))] + "" + "sub %A0,%2 + sbc %B0,__zero_reg__ + sbc %C0,__zero_reg__ + sbc %D0,__zero_reg__" + [(set_attr "length" "4") + (set_attr "cc" "set_n")]) + ;****************************************************************************** ; mul -- 2.30.2