From e3032a052321ea1fdfbca090618149ae1ed33911 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sat, 28 Jan 2012 15:05:06 +0100 Subject: [PATCH] r600g: use a more clever way to disable per-vertex point size This uses point size clamping to force point size to a particular value, making the vertex shader output irrelevant. Reviewed-by: Dave Airlie Reviewed-by: Alex Deucher --- src/gallium/drivers/r600/evergreen_state.c | 19 ++++++++++++------- src/gallium/drivers/r600/r600_shader.c | 1 + src/gallium/drivers/r600/r600_shader.h | 1 + src/gallium/drivers/r600/r600_state.c | 19 ++++++++++++------- 4 files changed, 26 insertions(+), 14 deletions(-) diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 5aaf235fa4c..57942fb0bc9 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -925,16 +925,19 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx, S_028814_POLY_MODE(polygon_dual_mode) | S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) | S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back)), 0xFFFFFFFF, NULL, 0); - r600_pipe_state_add_reg(rstate, R_02881C_PA_CL_VS_OUT_CNTL, - S_02881C_USE_VTX_POINT_SIZE(state->point_size_per_vertex), - S_02881C_USE_VTX_POINT_SIZE(1), NULL, 0); r600_pipe_state_add_reg(rstate, R_028820_PA_CL_NANINF_CNTL, 0x00000000, 0xFFFFFFFF, NULL, 0); /* point size 12.4 fixed point */ tmp = (unsigned)(state->point_size * 8.0); r600_pipe_state_add_reg(rstate, R_028A00_PA_SU_POINT_SIZE, S_028A00_HEIGHT(tmp) | S_028A00_WIDTH(tmp), 0xFFFFFFFF, NULL, 0); - psize_min = util_get_min_point_size(state); - psize_max = 8192; + if (state->point_size_per_vertex) { + psize_min = util_get_min_point_size(state); + psize_max = 8192; + } else { + /* Force the point size to be as if the vertex output was disabled. */ + psize_min = state->point_size; + psize_max = state->point_size; + } /* Divide by two, because 0.5 = 1 pixel. */ r600_pipe_state_add_reg(rstate, R_028A04_PA_SU_POINT_MINMAX, S_028A04_MIN_SIZE(r600_pack_float_12p4(psize_min/2)) | @@ -2458,10 +2461,12 @@ void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader R_02881C_PA_CL_VS_OUT_CNTL, S_02881C_VS_OUT_CCDIST0_VEC_ENA((rshader->clip_dist_write & 0x0F) != 0) | S_02881C_VS_OUT_CCDIST1_VEC_ENA((rshader->clip_dist_write & 0xF0) != 0) | - S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write), + S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write) | + S_02881C_USE_VTX_POINT_SIZE(rshader->vs_out_point_size), S_02881C_VS_OUT_CCDIST0_VEC_ENA(1) | S_02881C_VS_OUT_CCDIST1_VEC_ENA(1) | - S_02881C_VS_OUT_MISC_VEC_ENA(1), + S_02881C_VS_OUT_MISC_VEC_ENA(1) | + S_02881C_USE_VTX_POINT_SIZE(1), NULL, 0); } diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index df6783662c2..6acd2160878 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -487,6 +487,7 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx) break; case TGSI_SEMANTIC_PSIZE: ctx->shader->vs_out_misc_write = 1; + ctx->shader->vs_out_point_size = 1; break; case TGSI_SEMANTIC_CLIPVERTEX: ctx->clip_vertex_write = TRUE; diff --git a/src/gallium/drivers/r600/r600_shader.h b/src/gallium/drivers/r600/r600_shader.h index fd98d09da86..2d35e770070 100644 --- a/src/gallium/drivers/r600/r600_shader.h +++ b/src/gallium/drivers/r600/r600_shader.h @@ -54,6 +54,7 @@ struct r600_shader { unsigned clip_dist_write; /* flag is set if the shader writes VS_OUT_MISC_VEC (e.g. for PSIZE) */ boolean vs_out_misc_write; + boolean vs_out_point_size; }; #endif diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index d786a2c9b9b..9397512d042 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -980,16 +980,19 @@ static void *r600_create_rs_state(struct pipe_context *ctx, S_028814_POLY_MODE(polygon_dual_mode) | S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) | S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back)), 0xFFFFFFFF, NULL, 0); - r600_pipe_state_add_reg(rstate, R_02881C_PA_CL_VS_OUT_CNTL, - S_02881C_USE_VTX_POINT_SIZE(state->point_size_per_vertex), - S_02881C_USE_VTX_POINT_SIZE(1), NULL, 0); r600_pipe_state_add_reg(rstate, R_028820_PA_CL_NANINF_CNTL, 0x00000000, 0xFFFFFFFF, NULL, 0); /* point size 12.4 fixed point */ tmp = (unsigned)(state->point_size * 8.0); r600_pipe_state_add_reg(rstate, R_028A00_PA_SU_POINT_SIZE, S_028A00_HEIGHT(tmp) | S_028A00_WIDTH(tmp), 0xFFFFFFFF, NULL, 0); - psize_min = util_get_min_point_size(state); - psize_max = 8192; + if (state->point_size_per_vertex) { + psize_min = util_get_min_point_size(state); + psize_max = 8192; + } else { + /* Force the point size to be as if the vertex output was disabled. */ + psize_min = state->point_size; + psize_max = state->point_size; + } /* Divide by two, because 0.5 = 1 pixel. */ r600_pipe_state_add_reg(rstate, R_028A04_PA_SU_POINT_MINMAX, S_028A04_MIN_SIZE(r600_pack_float_12p4(psize_min/2)) | @@ -2242,10 +2245,12 @@ void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shad R_02881C_PA_CL_VS_OUT_CNTL, S_02881C_VS_OUT_CCDIST0_VEC_ENA((rshader->clip_dist_write & 0x0F) != 0) | S_02881C_VS_OUT_CCDIST1_VEC_ENA((rshader->clip_dist_write & 0xF0) != 0) | - S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write), + S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write) | + S_02881C_USE_VTX_POINT_SIZE(rshader->vs_out_point_size), S_02881C_VS_OUT_CCDIST0_VEC_ENA(1) | S_02881C_VS_OUT_CCDIST1_VEC_ENA(1) | - S_02881C_VS_OUT_MISC_VEC_ENA(1), + S_02881C_VS_OUT_MISC_VEC_ENA(1) | + S_02881C_USE_VTX_POINT_SIZE(1), NULL, 0); } -- 2.30.2