From e346be603e6a7e63911fa50ada3046a2393aec60 Mon Sep 17 00:00:00 2001 From: lkcl Date: Tue, 11 Feb 2020 00:19:26 +0000 Subject: [PATCH] --- 3d_gpu/architecture/dynamic_simd/shift.mdwn | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/3d_gpu/architecture/dynamic_simd/shift.mdwn b/3d_gpu/architecture/dynamic_simd/shift.mdwn index 39820e449..7042e7a7e 100644 --- a/3d_gpu/architecture/dynamic_simd/shift.mdwn +++ b/3d_gpu/architecture/dynamic_simd/shift.mdwn @@ -5,7 +5,9 @@ This is almost as complex as multiplication, except there is a trick that can be Partitioned Shifting will also require to have an NxN matrix, however it is slightly different. first, define the following: a0 = a[7..0], a1 = a[15..8], .... - b0 = b[7..0], b1 = b[15..8], .... + b0 = b[0+4..0], b1 = b[8+4..8], b2 = b[16+4..16], b3 = b[24+4..24] + +QUESTION: should b1 be limited to min(b[8+4..8], 24), b2 be similarly limited to 15, and b3 be limited/min'd to 8? then, we compute the following matrix, with the first column output being the full width (32 bit), the second being only 24 bit, the third only 16 bit and finally the top part (comprising the most significant byte of a and b as input) being only 8 bit -- 2.30.2