From e377793637fe2eefc7f5e6b48a79ff1ed8480caf Mon Sep 17 00:00:00 2001 From: Xan Date: Wed, 25 Apr 2018 12:41:54 +0100 Subject: [PATCH] --- ...alysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn b/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn index 38026f87e..b76f22a70 100644 --- a/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn +++ b/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn @@ -27,7 +27,7 @@ Values for mm field (bits 12:13 above): * mm = 10 -> use v1 as predicate mask, and use global saturation / rounding settings * mm = 11 -> use ~v1 as predicate mask, and use global saturation / rounding settings -## Register file +## Register file comparison The default Harmonised RVP GPR register file is divided into a lower bank of Vector[INT8] and an upper bank of Vector[INT16]. In contrast, the Andes Packed SIMD ISA permits any GPR to be used for either INT8 or INT16 vector operations -- 2.30.2