From e395c30c40fad375adecb5697a1b7f4076b9aae5 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 26 Jan 2020 13:08:52 +0000 Subject: [PATCH] whoops sort out page hierarchy --- 3d_gpu/architecture.mdwn | 4 ++-- 3d_gpu/architecture/dynamic_simd.mdwn | 6 +++--- .../{3d_gpu/architecture => }/dynamic_simd/eq.mdwn | 0 3 files changed, 5 insertions(+), 5 deletions(-) rename 3d_gpu/architecture/{3d_gpu/architecture => }/dynamic_simd/eq.mdwn (100%) diff --git a/3d_gpu/architecture.mdwn b/3d_gpu/architecture.mdwn index 83f9c3f8e..ca20268e1 100644 --- a/3d_gpu/architecture.mdwn +++ b/3d_gpu/architecture.mdwn @@ -20,7 +20,7 @@ There are no separate scalar ALUs and separate SIMD ALUs. The ALUs are dynamical The only reason this design can even remotely be considered is down to the use of standard python Software Engineering Object-Orientated techniques, on top of nmigen, which industry-standard HDLs such as VHDL and Verilog completely lack. -See [[3d_gpu/architecture/dynamic_simd]] for details. +See [[architecture/dynamic_simd]] for details. # Dynamic Pipeline length adjustment @@ -34,7 +34,7 @@ The only reason why this ingenious and elegant trick (deployed first by IBM in t # Memory and Cache arrangement -Section TODO, with own page [[3d_gpu/architecture/memory_and_cache]] LD/ST accesses are controlled by the 6600-style Dependency Matrices +Section TODO, with own page [[architecture/memory_and_cache]] LD/ST accesses are controlled by the 6600-style Dependency Matrices # Bus arrangement diff --git a/3d_gpu/architecture/dynamic_simd.mdwn b/3d_gpu/architecture/dynamic_simd.mdwn index dd0f36582..b673d6d40 100644 --- a/3d_gpu/architecture/dynamic_simd.mdwn +++ b/3d_gpu/architecture/dynamic_simd.mdwn @@ -8,6 +8,6 @@ Basic principle: when all partition gates are open the ALU is subdivided into is Pages below describe the basic features of each and track the relevant bugreports. -* [[3d_gpu/architecture/dynamic_simd/eq]] -* [[3d_gpu/architecture/dynamic_simd/add]] -* [[3d_gpu/architecture/dynamic_simd/mul]] +* [[dynamic_simd/eq]] +* [[dynamic_simd/add]] +* [[dynamic_simd/mul]] diff --git a/3d_gpu/architecture/3d_gpu/architecture/dynamic_simd/eq.mdwn b/3d_gpu/architecture/dynamic_simd/eq.mdwn similarity index 100% rename from 3d_gpu/architecture/3d_gpu/architecture/dynamic_simd/eq.mdwn rename to 3d_gpu/architecture/dynamic_simd/eq.mdwn -- 2.30.2