From e3c6bd58466c4d9f8bb3684383bb72673d4c3783 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Mon, 19 Nov 2018 12:50:07 +0100 Subject: [PATCH] build/microsemi/libero_soc: pass timing constraints to synthesis, place & route and timing verification tools --- litex/build/microsemi/libero_soc.py | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/litex/build/microsemi/libero_soc.py b/litex/build/microsemi/libero_soc.py index 6e561c4d..779e6983 100644 --- a/litex/build/microsemi/libero_soc.py +++ b/litex/build/microsemi/libero_soc.py @@ -113,12 +113,13 @@ def _build_tcl(platform, sources, build_dir, build_name): # import timing constraints tcl.append("import_files -convert_EDN_to_HDL 0 -sdc {{{}}}".format(build_name + ".sdc")) - tcl.append(" ".join(["organize_tool_files", - "-tool {VERIFYTIMING}", - "-file impl/constraint/{}.sdc".format(build_name), - "-module {}".format(build_name), - "-input_type {constraint}" - ])) + for tool in ["{SYNTHESIZE}", "{PLACEROUTE}", "{VERIFYTIMING}"]: + tcl.append(" ".join(["organize_tool_files", + "-tool " + tool, + "-file impl/constraint/{}.sdc".format(build_name), + "-module {}".format(build_name), + "-input_type {constraint}" + ])) # build flow tcl.append("run_tool -name {CONSTRAINT_MANAGEMENT}") -- 2.30.2