From e4210b93e441c85bf8d54d0605294a97459bad8a Mon Sep 17 00:00:00 2001 From: =?utf8?q?Alejandro=20Pi=C3=B1eiro?= Date: Wed, 27 Feb 2019 15:28:47 +0100 Subject: [PATCH] i965: don't use disk cache with SPIR-V shaders Right now we don't support disk cache for SPIR-V shaders (from ARB_gl_spirv), so let's avoid writing the program data to or reading it from the disk if any in-use shaders use SPIR-V. Reviewed-by: Caio Marcelo de Oliveira Filho --- src/mesa/drivers/dri/i965/brw_disk_cache.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_disk_cache.c b/src/mesa/drivers/dri/i965/brw_disk_cache.c index f7fe1e2aec8..15e3e895d6c 100644 --- a/src/mesa/drivers/dri/i965/brw_disk_cache.c +++ b/src/mesa/drivers/dri/i965/brw_disk_cache.c @@ -235,6 +235,9 @@ brw_disk_cache_upload_program(struct brw_context *brw, gl_shader_stage stage) if (prog == NULL) return false; + if (prog->sh.data->spirv) + return false; + if (brw->ctx._Shader->Flags & GLSL_CACHE_FALLBACK) goto fail; @@ -296,8 +299,15 @@ brw_disk_cache_write_render_programs(struct brw_context *brw) if (cache == NULL) return; - struct gl_program *prog = - brw->ctx._Shader->CurrentProgram[MESA_SHADER_VERTEX]; + struct gl_program *prog; + gl_shader_stage stage; + for (stage = MESA_SHADER_VERTEX; stage <= MESA_SHADER_FRAGMENT; stage++) { + prog = brw->ctx._Shader->CurrentProgram[stage]; + if (prog && prog->sh.data->spirv) + return; + } + + prog = brw->ctx._Shader->CurrentProgram[MESA_SHADER_VERTEX]; if (prog && !prog->program_written_to_cache) { struct brw_vs_prog_key vs_key; brw_vs_populate_key(brw, &vs_key); @@ -362,6 +372,10 @@ brw_disk_cache_write_compute_program(struct brw_context *brw) struct gl_program *prog = brw->ctx._Shader->CurrentProgram[MESA_SHADER_COMPUTE]; + + if (prog && prog->sh.data->spirv) + return; + if (prog && !prog->program_written_to_cache) { struct brw_cs_prog_key cs_key; brw_cs_populate_key(brw, &cs_key); -- 2.30.2